From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Zhi Wang <zhi.a.wang@intel.com>,
intel-gfx@lists.freedesktop.org, tvrtko.ursulin@linux.intel.com,
kevin.tian@intel.com, zhiyuan.lv@intel.com,
chris@chris-wilson.co.uk
Subject: Re: [PATCH v6 8/9] drm/i915: Support LRC context single submission
Date: Fri, 03 Jun 2016 12:47:29 +0300 [thread overview]
Message-ID: <1464947249.7292.42.camel@linux.intel.com> (raw)
In-Reply-To: <1464885380-7056-9-git-send-email-zhi.a.wang@intel.com>
On to, 2016-06-02 at 12:36 -0400, Zhi Wang wrote:
> This patch introduces the support of LRC context signle submission.
"single"
> As GVT context may come from different guests, which requires different
"require"
> configuration of render registers. It can't be combined into a dual ELSP
> submission combo.
>
> Only GVT-g will create this kinds of GEM context currently.
>
> v6:
> - Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris)
>
> v5:
>
> - Only compile this feature when CONFIG_DRM_I915_GVT=y. (Tvrtko)
>
> Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_lrc.c | 15 +++++++++++++++
> 2 files changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index dee72d3..92d01e3 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -882,6 +882,7 @@ struct i915_gem_context {
> u32 lrc_ring_buffer_size;
> u32 lrc_addressing_mode_bits;
> bool enable_lrc_status_change_notification;
> + bool enable_lrc_single_submission;
>
> struct list_head link;
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 96d20c8..ce707ea 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -446,6 +446,21 @@ static void execlists_context_unqueue(struct intel_engine_cs *engine)
> i915_gem_request_unreference(req0);
> req0 = cursor;
> } else {
> + /* Compiler will do the dead-code elimination */
> + if (IS_ENABLED(CONFIG_DRM_I915_GVT)) {
> + /*
> + * req0 (after merged) ctx requires single
> + * submission, stop picking
> + */
> + if (req0->ctx->enable_lrc_single_submission)
> + break;
> + /*
> + * req0 ctx doesn't require single submission,
> + * but next req ctx requires, stop picking
> + */
> + if (cursor->ctx->enable_lrc_single_submission)
> + break;
> + }
I remember discussing this on the F2F, we will be aware of the VM IDs
at this point, so we could use that criterion, instead of just
disabling it pessimistically. Is there some reason we could not do it?
Check would be rather simple;
#if IS_ENABLED(CONFIG_DRM_I915_GVT)
if (req0->gvt.vmid != cursor->gvt.vmid)
break;
#endif
I'm not sure if it will be worth the #if when vmid would be zero in
DOM0 always.
Regards, Joonas
> req1 = cursor;
> WARN_ON(req1->elsp_submitted);
> break;
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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next prev parent reply other threads:[~2016-06-03 9:47 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-02 16:36 [PATCH v6 0/9] Introduce the implementation of GVT context Zhi Wang
2016-06-02 16:36 ` [PATCH v6 1/9] drm/i915: Factor out i915_pvinfo.h Zhi Wang
2016-06-03 8:45 ` Joonas Lahtinen
2016-06-02 16:36 ` [PATCH v6 2/9] drm/i915: Fold vGPU active check into inner functions Zhi Wang
2016-06-03 8:49 ` Joonas Lahtinen
2016-06-02 16:36 ` [PATCH v6 3/9] drm/i915: gvt: Introduce the basic architecture of GVT-g Zhi Wang
2016-06-03 9:14 ` Joonas Lahtinen
2016-06-02 16:36 ` [PATCH v6 4/9] drm/i915: Introduce host graphics memory partition for GVT-g Zhi Wang
2016-06-03 9:17 ` Joonas Lahtinen
2016-06-02 16:36 ` [PATCH v6 5/9] drm/i915: Make ring buffer size of a LRC context configurable Zhi Wang
2016-06-03 9:20 ` Joonas Lahtinen
2016-06-02 16:36 ` [PATCH v6 6/9] drm/i915: Make addressing mode bits in context descriptor configurable Zhi Wang
2016-06-03 9:25 ` Joonas Lahtinen
2016-06-02 16:36 ` [PATCH v6 7/9] drm/i915: Introduce execlist context status change notification Zhi Wang
2016-06-03 9:40 ` Joonas Lahtinen
2016-06-07 15:29 ` Wang, Zhi A
2016-06-08 7:49 ` Joonas Lahtinen
2016-06-02 16:36 ` [PATCH v6 8/9] drm/i915: Support LRC context single submission Zhi Wang
2016-06-03 9:47 ` Joonas Lahtinen [this message]
2016-06-03 11:25 ` Tian, Kevin
2016-06-07 14:13 ` Wang, Zhi A
2016-06-02 16:36 ` [PATCH v6 9/9] drm/i915: Introduce GVT context creation API Zhi Wang
2016-06-03 9:59 ` Joonas Lahtinen
2016-06-03 6:43 ` ✗ Ro.CI.BAT: warning for Introduce the implementation of GVT context (rev4) Patchwork
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