From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, Zhi Wang <zhi.a.wang@intel.com>
Cc: intel-gfx@lists.freedesktop.org, zhiyuan.lv@intel.com
Subject: Re: [PATCH v7 10/11] drm/i915: Support LRC context single submission
Date: Wed, 08 Jun 2016 11:44:20 +0300 [thread overview]
Message-ID: <1465375460.5803.26.camel@linux.intel.com> (raw)
In-Reply-To: <20160608070436.GD32344@nuc-i3427.alporthouse.com>
On ke, 2016-06-08 at 08:04 +0100, Chris Wilson wrote:
> On Tue, Jun 07, 2016 at 11:18:46AM -0400, Zhi Wang wrote:
> >
> > This patch introduces the support of LRC context single submission.
> > As GVT context may come from different guests, which require different
> > configuration of render registers. It can't be combined into a dual ELSP
> > submission combo.
> >
> > Only GVT-g will create this kinds of GEM context currently.
> >
> > v7:
> >
> > - Fix typos in commit message. (Joonas)
> >
> > v6:
> > - Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris)
> >
> > v5:
> >
> > - Only compile this feature when CONFIG_DRM_I915_GVT=y. (Tvrtko)
> >
> > Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_lrc.c | 15 +++++++++++++++
> > 2 files changed, 16 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 4ab4cf7..8f8a5bc 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -882,6 +882,7 @@ struct i915_gem_context {
> > u32 lrc_addressing_mode_bits;
> > struct atomic_notifier_head status_notifier;
> > bool enable_lrc_status_change_notification;
> > + bool enable_lrc_single_submission;
> >
> > struct list_head link;
> >
> > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> > index 956585d..e3cab06 100644
> > --- a/drivers/gpu/drm/i915/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/intel_lrc.c
> > @@ -447,6 +447,21 @@ static void execlists_context_unqueue(struct intel_engine_cs *engine)
> > i915_gem_request_unreference(req0);
> > req0 = cursor;
> > } else {
> > + /* Compiler will do the dead-code elimination */
> > + if (IS_ENABLED(CONFIG_DRM_I915_GVT)) {
> > + /*
> > + * req0 (after merged) ctx requires single
> > + * submission, stop picking
> > + */
> > + if (req0->ctx->enable_lrc_single_submission)
> enable_ is a bad verb here, force_ would be more apt.
>
> s/lrc/execlists/
>
> ctx->execlists_force_single_submission
> -Chris
Also CCing Kevin here, who commented on the previous patch. I still
think it would be good to do the req0->{vgpu,vmid} != cursor-
>{vgpu,vmid} test. That way, we get better results if there's one
dominating VM submitting workloads, right?
Regards, Joonas
>
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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next prev parent reply other threads:[~2016-06-08 8:44 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-07 15:18 [PATCH v7 00/11] Introduce the implementation of GVT context Zhi Wang
2016-06-07 15:18 ` [PATCH v7 01/11] drm/i915: Factor out i915_pvinfo.h Zhi Wang
2016-06-08 7:55 ` Joonas Lahtinen
2016-06-08 8:20 ` Wang, Zhi A
2016-06-07 15:18 ` [PATCH v7 02/11] drm/i915: Use offsetof() to calculate the offset of members in PVINFO page Zhi Wang
2016-06-08 7:57 ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 03/11] drm/i915: Fold vGPU active check into inner functions Zhi Wang
2016-06-08 8:04 ` Joonas Lahtinen
2016-06-08 8:06 ` Wang, Zhi A
2016-06-07 15:18 ` [PATCH v7 04/11] drm/i915: Add teardown path in intel_vgt_ballon() Zhi Wang
2016-06-08 8:12 ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 05/11] drm/i915: gvt: Introduce the basic architecture of GVT-g Zhi Wang
2016-06-08 8:28 ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 06/11] drm/i915: Introduce host graphics memory partition for GVT-g Zhi Wang
2016-06-07 15:18 ` [PATCH v7 07/11] drm/i915: Make ring buffer size of a LRC context configurable Zhi Wang
2016-06-08 7:08 ` Chris Wilson
2016-06-08 8:34 ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 08/11] drm/i915: Make addressing mode bits in context descriptor configurable Zhi Wang
2016-06-08 7:12 ` Chris Wilson
2016-06-08 8:17 ` Wang, Zhi A
2016-06-08 8:38 ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 09/11] drm/i915: Introduce execlist context status change notification Zhi Wang
2016-06-07 22:01 ` Chris Wilson
2016-06-08 8:40 ` Joonas Lahtinen
2016-06-07 15:18 ` [PATCH v7 10/11] drm/i915: Support LRC context single submission Zhi Wang
2016-06-08 7:04 ` Chris Wilson
2016-06-08 8:44 ` Joonas Lahtinen [this message]
2016-06-07 15:18 ` [PATCH v7 11/11] drm/i915: Introduce GVT context creation API Zhi Wang
2016-06-08 6:59 ` Chris Wilson
2016-06-07 15:53 ` ✓ Ro.CI.BAT: success for Introduce the implementation of GVT context (rev5) Patchwork
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