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From: Ander Conselvan De Oliveira <conselvan2@gmail.com>
To: intel-gfx@lists.freedesktop.org, "Deak, Imre" <imre.deak@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Subject: Re: [PATCH v2 1/8] drm/i915: Enable DDI IO power domains in the DP MST path
Date: Thu, 02 Mar 2017 11:06:07 +0200	[thread overview]
Message-ID: <1488445567.2457.1.camel@gmail.com> (raw)
In-Reply-To: <20170301141318.3607-2-ander.conselvan.de.oliveira@intel.com>

On Wed, 2017-03-01 at 16:13 +0200, Ander Conselvan de Oliveira wrote:
> Commit 62b695662a24 ("drm/i915: Only enable DDI IO power domains after
> enabling DPLL") changed how the DDI IO power domains get enabled, but
> neglected the need to enable those domains when enabling a DP connector
> with MST enabled, leading to
> 
>     Kernel panic - not syncing: Timeout: Not all CPUs entered broadcast exception handler
> 
> Fixes: 62b695662a24 ("drm/i915: Only enable DDI IO power domains after enabling DPLL")
> Cc: David Weinehall <david.weinehall@linux.intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
> Cc: David Weinehall <david.weinehall@linux.intel.com>
> Cc: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>

This was already

Reviewed-by: Imre Deak <imre.deak@intel.com>

Pushed this one so the regression is fixed. Thanks for reviewing.

Ander

> ---
>  drivers/gpu/drm/i915/intel_dp_mst.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> index d94fd4b..a8334e1 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -163,6 +163,9 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
>  		intel_ddi_clk_select(&intel_dig_port->base,
>  				     pipe_config->shared_dpll);
>  
> +		intel_display_power_get(dev_priv,
> +					intel_dig_port->ddi_io_power_domain);
> +
>  		intel_prepare_dp_ddi_buffers(&intel_dig_port->base);
>  		intel_dp_set_link_params(intel_dp,
>  					 pipe_config->port_clock,
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  reply	other threads:[~2017-03-02  9:06 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-01 14:13 [PATCH v2 0/8] Try to fix MST regression with DDI IO power domains Ander Conselvan de Oliveira
2017-03-01 14:13 ` [PATCH v2 1/8] drm/i915: Enable DDI IO power domains in the DP MST path Ander Conselvan de Oliveira
2017-03-02  9:06   ` Ander Conselvan De Oliveira [this message]
2017-03-01 14:13 ` [PATCH v2 2/8] drm/i915: Pass intel_crtc to fdi_link_train() hooks Ander Conselvan de Oliveira
2017-03-01 14:13 ` [PATCH v2 3/8] drm/i915: Pass intel_crtc to intel_lpt_pch_enable() Ander Conselvan de Oliveira
2017-03-01 14:13 ` [PATCH v2 4/8] drm/i915: Pass pipe_config to pch_enable() functions Ander Conselvan de Oliveira
2017-03-01 14:38   ` Ville Syrjälä
2017-03-02  9:43     ` [PATCH] " Ander Conselvan de Oliveira
2017-03-02 10:07       ` Ville Syrjälä
2017-03-01 14:13 ` [PATCH v2 5/8] drm/i915: Pass pipe_config to fdi_link_train() functions Ander Conselvan de Oliveira
2017-03-02  9:44   ` [PATCH] " Ander Conselvan de Oliveira
2017-03-01 14:13 ` [PATCH v2 6/8] drm/i915: Pass intel_crtc to DDI functions called from crtc en/disable Ander Conselvan de Oliveira
2017-03-01 14:13 ` [PATCH v2 7/8] drm/i915: Remove direct usages of intel_crtc->config from DDI code Ander Conselvan de Oliveira
2017-03-01 14:13 ` [PATCH v2 8/8] drm/i915: Remove duplicate DDI enabling logic from MST path Ander Conselvan de Oliveira
2017-03-02 10:16   ` Ville Syrjälä
2017-03-01 15:48 ` ✓ Fi.CI.BAT: success for Try to fix MST regression with DDI IO power domains (rev2) Patchwork
2017-03-02 10:48 ` ✓ Fi.CI.BAT: success for Try to fix MST regression with DDI IO power domains (rev4) Patchwork

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