From: Zhi Wang <zhi.a.wang@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org
Subject: [RFC 3/7] drm/i915: Introduce GEN8 {set, get} private PAT index ops
Date: Wed, 16 Aug 2017 05:31:11 +0800 [thread overview]
Message-ID: <1502832675-6123-4-git-send-email-zhi.a.wang@intel.com> (raw)
In-Reply-To: <1502832675-6123-1-git-send-email-zhi.a.wang@intel.com>
Introduce operations of {set, get} private PAT index to decode and encode
the private PAT index in a guest/shadow PPGTT page table entry.
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
---
drivers/gpu/drm/i915/gvt/gtt.c | 38 ++++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/gvt/gtt.h | 3 +++
2 files changed, 41 insertions(+)
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index 16bfca9..c630015 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -378,6 +378,42 @@ static void gtt_entry_clear_present(struct intel_gvt_gtt_entry *e)
}
/*
+ * For GEN8 platform.
+ * PAT: bit 7, PCD: bit 4, PWT: bit 3.
+ * Index: index = 4 * PAT + 2 * PCD + PWT
+ */
+static unsigned int gen8_get_pat_index(struct intel_gvt_gtt_entry *e)
+{
+ u8 index = 0;
+
+ if (_PAGE_PWT & e->val64)
+ index |= (1 << 0);
+
+ if (_PAGE_PCD & e->val64)
+ index |= (1 << 1);
+
+ if (_PAGE_PAT & e->val64)
+ index |= (1 << 2);
+
+ return index;
+}
+
+static void gen8_set_pat_index(struct intel_gvt_gtt_entry *e,
+ unsigned int index)
+{
+ e->val64 &= ~(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT);
+
+ if (index & (1 << 0))
+ e->val64 |= _PAGE_PWT;
+
+ if (index & (1 << 1))
+ e->val64 |= _PAGE_PCD;
+
+ if (index & (1 << 2))
+ e->val64 |= _PAGE_PAT;
+}
+
+/*
* Per-platform GMA routines.
*/
static unsigned long gma_to_ggtt_pte_index(unsigned long gma)
@@ -484,6 +520,8 @@ static struct intel_gvt_gtt_pte_ops gen8_gtt_pte_ops = {
.test_pse = gen8_gtt_test_pse,
.get_pfn = gen8_gtt_get_pfn,
.set_pfn = gen8_gtt_set_pfn,
+ .get_pat_index = gen8_get_pat_index,
+ .set_pat_index = gen8_set_pat_index,
};
static struct intel_gvt_gtt_gma_ops gen8_gtt_gma_ops = {
diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h
index 7a9eb05..02f6bd9 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.h
+++ b/drivers/gpu/drm/i915/gvt/gtt.h
@@ -66,6 +66,9 @@ struct intel_gvt_gtt_pte_ops {
bool (*test_pse)(struct intel_gvt_gtt_entry *e);
void (*set_pfn)(struct intel_gvt_gtt_entry *e, unsigned long pfn);
unsigned long (*get_pfn)(struct intel_gvt_gtt_entry *e);
+ unsigned int (*get_pat_index)(struct intel_gvt_gtt_entry *e);
+ void (*set_pat_index)(struct intel_gvt_gtt_entry *e,
+ unsigned int index);
};
struct intel_gvt_gtt_gma_ops {
--
2.7.4
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next prev parent reply other threads:[~2017-08-15 21:31 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-15 21:31 [RFC 0/7] Introduce dynamic PPAT managment for GVT-g Zhi Wang
2017-08-15 13:51 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-08-15 21:31 ` [RFC 1/7] drm/i915: Introduce a bitmap to indicate available PPAT entries Zhi Wang
2017-08-15 21:31 ` [RFC 2/7] drm/i915/gvt: Introduce GEN8 private PAT ops Zhi Wang
2017-08-16 5:12 ` Zhenyu Wang
2017-08-16 13:46 ` Zhi Wang
2017-08-16 6:52 ` Zhenyu Wang
2017-08-15 21:31 ` Zhi Wang [this message]
2017-08-15 21:31 ` [RFC 4/7] drm/i915: Introduce dynamic private PAT management Zhi Wang
2017-08-15 21:31 ` [RFC 5/7] drm/i915/gvt: Introduce functions for retiring all shadow PPGTTs of a vGPU Zhi Wang
2017-08-15 21:31 ` [RFC 6/7] drm/i915/gvt: Introduce virtual private PAT support Zhi Wang
2017-08-16 5:18 ` Zhenyu Wang
2017-08-16 13:48 ` Zhi Wang
2017-08-16 6:13 ` Zhenyu Wang
2017-08-16 6:29 ` Wang, Zhi A
2017-08-15 21:31 ` [RFC 7/7] drm/i915/gvt: Translate virtual PPAT indexes Zhi Wang
2017-08-15 21:33 ` [RFC 0/7] Introduce dynamic PPAT managment for GVT-g Zhi Wang
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