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From: Oscar Mateo <oscar.mateo@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Mika Kuoppala <mika.kuoppala@intel.com>
Subject: [PATCH 4/6] drm/i915: Transform WaDisableGafsUnitClkGating into a simple reg write
Date: Thu,  7 Sep 2017 08:40:07 -0700	[thread overview]
Message-ID: <1504798809-5653-4-git-send-email-oscar.mateo@intel.com> (raw)
In-Reply-To: <1504798809-5653-1-git-send-email-oscar.mateo@intel.com>

GEN7_UCGCTL4 does not live in the context.

v2: Missing parenthesis

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/i915/intel_engine_cs.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index cdd86ef..829552b 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -981,7 +981,8 @@ static int skl_init_workarounds(struct intel_engine_cs *engine)
 				   GEN9_GAPS_TSV_CREDIT_DISABLE));
 
 	/* WaDisableGafsUnitClkGating:skl */
-	WA_SET_BIT(GEN7_UCGCTL4, GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
+	I915_WRITE(GEN7_UCGCTL4, (I915_READ(GEN7_UCGCTL4) |
+				  GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE));
 
 	/* WaInPlaceDecompressionHang:skl */
 	if (IS_SKL_REVID(dev_priv, SKL_REVID_H0, REVID_FOREVER))
@@ -1139,7 +1140,8 @@ static int kbl_init_workarounds(struct intel_engine_cs *engine)
 				  GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
 
 	/* WaDisableGafsUnitClkGating:kbl */
-	WA_SET_BIT(GEN7_UCGCTL4, GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
+	I915_WRITE(GEN7_UCGCTL4, (I915_READ(GEN7_UCGCTL4) |
+				  GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE));
 
 	/* WaDisableSbeCacheDispatchPortSharing:kbl */
 	WA_SET_BIT_MASKED(
@@ -1193,7 +1195,8 @@ static int cfl_init_workarounds(struct intel_engine_cs *engine)
 			  GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
 
 	/* WaDisableGafsUnitClkGating:cfl */
-	WA_SET_BIT(GEN7_UCGCTL4, GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
+	I915_WRITE(GEN7_UCGCTL4, (I915_READ(GEN7_UCGCTL4) |
+				  GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE));
 
 	/* WaDisableSbeCacheDispatchPortSharing:cfl */
 	WA_SET_BIT_MASKED(
-- 
1.9.1

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  parent reply	other threads:[~2017-09-07 15:40 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-07 15:40 [PATCH 1/6] drm/i915: Transform WaInPlaceDecompressionHang into a simple reg write Oscar Mateo
2017-09-07 15:40 ` [PATCH 2/6] drm/i915: Transform WaDisableI2mCycleOnWRPort " Oscar Mateo
2017-09-07 15:40 ` [PATCH 3/6] drm/i915: WaPushConstantDereferenceHoldDisable needs to modify a masked register Oscar Mateo
2017-09-07 15:40 ` Oscar Mateo [this message]
2017-09-07 15:40 ` [PATCH 5/6] drm/i915: Transform WaDisableDynamicCreditSharing into a simple register write Oscar Mateo
2017-09-07 15:40 ` [PATCH 6/6] drm/i915: Transform WaDisablePooledEuLoadBalancingFix " Oscar Mateo
2017-09-07 15:58 ` ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915: Transform WaInPlaceDecompressionHang into a simple reg write Patchwork
2017-09-07 21:02   ` Chris Wilson
2017-09-07 20:26 ` ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2017-09-07  0:15 [PATCH 1/6] " Oscar Mateo
2017-09-07  0:15 ` [PATCH 4/6] drm/i915: Transform WaDisableGafsUnitClkGating " Oscar Mateo

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