From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ville.syrjala@intel.com, maarten.lankhorst@intel.com
Subject: [v3 3/3] drm/i915/icl: Add degamma and gamma lut size to gen11 caps
Date: Thu, 29 Nov 2018 20:21:43 +0530 [thread overview]
Message-ID: <1543503103-882-4-git-send-email-uma.shankar@intel.com> (raw)
In-Reply-To: <1543503103-882-1-git-send-email-uma.shankar@intel.com>
Add the degamma and gamma lut sizes to gen11 capability
structure.
v2: Reorder the patch as per Maarten's suggestion.
v3: Rebase
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/i915_pci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 1b81d7c..94f455d 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -624,7 +624,8 @@
}, \
GEN(11), \
.ddb_size = 2048, \
- .has_logical_ring_elsq = 1
+ .has_logical_ring_elsq = 1, \
+ .color = { .degamma_lut_size = 33, .gamma_lut_size = 1024 }
static const struct intel_device_info intel_icelake_11_info = {
GEN11_FEATURES,
--
1.9.1
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next prev parent reply other threads:[~2018-11-29 14:30 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-29 14:51 [v3 0/3] Add support for Gen 11 pipe color features Uma Shankar
2018-11-29 14:51 ` [v3 1/3] drm/i915/icl: Add icl pipe degamma and gamma support Uma Shankar
2018-11-29 23:07 ` Matt Roper
2018-11-30 15:32 ` Shankar, Uma
2018-11-29 14:51 ` [v3 2/3] drm/i915/icl: Enable ICL Pipe CSC block Uma Shankar
2018-11-30 19:20 ` Matt Roper
2018-11-29 14:51 ` Uma Shankar [this message]
2018-11-30 19:22 ` [v3 3/3] drm/i915/icl: Add degamma and gamma lut size to gen11 caps Matt Roper
2018-11-29 15:09 ` ✗ Fi.CI.CHECKPATCH: warning for Add support for Gen 11 pipe color features (rev3) Patchwork
2018-11-29 15:26 ` ✓ Fi.CI.BAT: success " Patchwork
2018-11-30 3:58 ` ✓ Fi.CI.IGT: " Patchwork
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