public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: ville.syrjala@intel.com, maarten.lankhorst@intel.com
Subject: [v7 12/16] drm/i915/icl: Add Plane Gamma Register Definitions
Date: Fri, 29 Mar 2019 01:46:10 +0530	[thread overview]
Message-ID: <1553804174-2651-13-git-send-email-uma.shankar@intel.com> (raw)
In-Reply-To: <1553804174-2651-1-git-send-email-uma.shankar@intel.com>

Add Plane Gamma Register definitions for ICL+

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 42 ++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 41 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ed02963..5f5c18a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -10222,7 +10222,47 @@ enum skl_power_gate {
 
 #define PLANE_PRE_CSC_GAMC_DATA(pipe, plane, i)	_MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_4(pipe),\
 									 _PLANE_PRE_CSC_GAMC_DATA_5(pipe))
-
+/* Plane Gamma Registers */
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1_A	0x701D8
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1_B	0x711D8
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2_A	0x702D8
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2_B	0x712D8
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe)	_PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_ENH_1_A, _PLANE_POST_CSC_GAMC_INDEX_ENH_1_B)
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe)	_PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_ENH_2_A, _PLANE_POST_CSC_GAMC_INDEX_ENH_2_B)
+
+#define PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, i)	_MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe),\
+									 _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe))
+
+#define _PLANE_POST_CSC_GAMC_INDEX_4_A		0x704D8
+#define _PLANE_POST_CSC_GAMC_INDEX_4_B		0x714D8
+#define _PLANE_POST_CSC_GAMC_INDEX_5_A		0x705D8
+#define _PLANE_POST_CSC_GAMC_INDEX_5_B		0x715D8
+#define _PLANE_POST_CSC_GAMC_INDEX_4(pipe)	_PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_4_A, _PLANE_POST_CSC_GAMC_INDEX_4_B)
+#define _PLANE_POST_CSC_GAMC_INDEX_5(pipe)	_PIPE(pipe, _PLANE_POSt_CSC_GAMC_INDEX_5_A, _PLANE_POST_CSC_GAMC_INDEX_5_B)
+
+#define PLANE_POST_CSC_GAMC_INDEX(pipe, plane, i)	_MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_4(pipe),\
+									 _PLANE_POSt_CSC_GAMC_INDEX_5(pipe))
+
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_1_A	0x701DC
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_1_B	0x711DC
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_2_A	0x702DC
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_2_B	0x712DC
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe)	_PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_ENH_1_A, _PLANE_POST_CSC_GAMC_DATA_ENH_1_B)
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe)	_PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_ENH_2_A, _PLANE_POST_CSC_GAMC_DATA_ENH_2_B)
+
+#define PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, i)	_MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe),\
+									 _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe))
+
+#define _PLANE_POST_CSC_GAMC_DATA_4_A		0x704DC
+#define _PLANE_POST_CSC_GAMC_DATA_4_B		0x714DC
+#define _PLANE_POST_CSC_GAMC_DATA_5_A		0x705DC
+#define _PLANE_POST_CSC_GAMC_DATA_5_B		0x715DC
+#define _PLANE_POST_CSC_GAMC_DATA_4(pipe)	_PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_4_A, _PLANE_POST_CSC_GAMC_DATA_4_B)
+#define _PLANE_POST_CSC_GAMC_DATA_5(pipe)	_PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_5_A, _PLANE_POST_CSC_GAMC_DATA_5_B)
+
+#define PLANE_POST_CSC_GAMC_DATA(pipe, plane, i)	_MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_4(pipe),\
+									 _PLANE_POST_CSC_GAMC_DATA_5(pipe))
+/* Plane Gamma Registers */
 /* pipe CSC & degamma/gamma LUTs on CHV */
 #define _CGM_PIPE_A_CSC_COEFF01	(VLV_DISPLAY_BASE + 0x67900)
 #define _CGM_PIPE_A_CSC_COEFF23	(VLV_DISPLAY_BASE + 0x67904)
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-03-28 20:16 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-28 20:15 [v7 00/16] Add Plane Color Properties Uma Shankar
2019-03-28 20:15 ` ✗ Fi.CI.BAT: failure for Add Plane Color Properties (rev7) Patchwork
2019-03-28 20:15 ` [v7 01/16] drm: Add Enhanced Gamma LUT precision structure Uma Shankar
2019-08-13  9:41   ` [v7, " james qian wang (Arm Technology China)
2019-08-14 14:29     ` Shankar, Uma
2019-08-19  7:59       ` james qian wang (Arm Technology China)
2019-03-28 20:16 ` [v7 02/16] drm: Add Plane Degamma properties Uma Shankar
2019-03-28 20:16 ` [v7 03/16] drm: Add Plane CTM property Uma Shankar
2019-03-28 20:16 ` [v7 04/16] drm: Add Plane Gamma properties Uma Shankar
2019-03-28 20:16 ` [v7 05/16] drm: Define helper function for plane color enabling Uma Shankar
2019-03-28 20:16 ` [v7 06/16] drm/i915: Enable plane color features Uma Shankar
2019-03-28 20:16 ` [v7 07/16] drm/i915: Implement Plane Gamma for Bdw and Gen9 platforms Uma Shankar
2019-03-28 20:16 ` [v7 08/16] drm/i915: Load plane color luts from atomic flip Uma Shankar
2019-03-28 20:16 ` [v7 09/16] drm/i915: Add plane color capabilities Uma Shankar
2019-03-28 20:16 ` [v7 10/16] drm/i915/icl: Add ICL Plane Degamma Register definition Uma Shankar
2019-03-28 20:16 ` [v7 11/16] drm/i915/icl: Enable Plane Degamma Uma Shankar
2019-03-28 20:16 ` Uma Shankar [this message]
2019-03-28 20:16 ` [v7 13/16] drm/i915/icl: Implement Plane Gamma Uma Shankar
2019-03-28 20:16 ` [v7 14/16] drm/i915: Enable Plane Gamma/Degamma Uma Shankar
2019-03-28 20:16 ` [v7 15/16] drm/i915: Define Plane CSC Registers Uma Shankar
2019-03-28 20:16 ` [v7 16/16] drm/i915: Enable Plane CSC Uma Shankar
2019-06-14 16:17 ` [v7 00/16] Add Plane Color Properties Ezequiel Garcia
2019-06-14 21:22   ` Ezequiel Garcia
2019-06-19  6:20   ` Shankar, Uma
2019-06-19 13:18     ` Ezequiel Garcia
2019-06-19 15:03       ` Ville Syrjälä
2019-06-19 15:33         ` Ezequiel Garcia
2019-06-19 16:29           ` Ville Syrjälä
2019-06-20 13:42             ` Shankar, Uma

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1553804174-2651-13-git-send-email-uma.shankar@intel.com \
    --to=uma.shankar@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=maarten.lankhorst@intel.com \
    --cc=ville.syrjala@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox