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From: Xiaolin Zhang <xiaolin.zhang@intel.com>
To: intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: zhenyu.z.wang@intel.com, hang.yuan@intel.com, zhiyuan.lv@intel.com
Subject: [PATCH v8 6/9] drm/i915/gvt: GVTg handle pv_caps PVINFO register
Date: Tue, 23 Jul 2019 19:32:01 +0800	[thread overview]
Message-ID: <1563881524-147440-7-git-send-email-xiaolin.zhang@intel.com> (raw)
In-Reply-To: <1563881524-147440-1-git-send-email-xiaolin.zhang@intel.com>

implement pv_caps PVINFO register handler in GVTg to
control different level pv optimization within guest.

report VGT_CAPS_PV capability in pvinfo page for guest.

v0: RFC.
v1: rebase.
v2: rebase.
v3: renamed enable_pvmmio to pvmmio_caps which is used for host
pv caps.
v4: renamed pvmmio_caps to pv_caps.
v5: rebase.
v6: rebase.
v7: rebase.

Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
---
 drivers/gpu/drm/i915/gvt/handlers.c | 4 ++++
 drivers/gpu/drm/i915/gvt/vgpu.c     | 3 +++
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 25f7819..ded97b3 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1194,6 +1194,7 @@ static int pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
 		break;
 	case 0x78010:	/* vgt_caps */
 	case 0x7881c:
+	case _vgtif_reg(pv_caps):
 		break;
 	default:
 		invalid_read = true;
@@ -1264,6 +1265,9 @@ static int pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
 	case _vgtif_reg(g2v_notify):
 		handle_g2v_notification(vgpu, data);
 		break;
+	case _vgtif_reg(pv_caps):
+		DRM_INFO("vgpu id=%d pv caps =0x%x\n", vgpu->id, data);
+		break;
 	/* add xhot and yhot to handled list to avoid error log */
 	case _vgtif_reg(cursor_x_hot):
 	case _vgtif_reg(cursor_y_hot):
diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
index 44ce3c2..3ecc45a 100644
--- a/drivers/gpu/drm/i915/gvt/vgpu.c
+++ b/drivers/gpu/drm/i915/gvt/vgpu.c
@@ -47,6 +47,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu)
 	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_PPGTT;
 	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
 	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
+	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_PV;
 
 	vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
 		vgpu_aperture_gmadr_base(vgpu);
@@ -531,6 +532,7 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
 	struct intel_gvt *gvt = vgpu->gvt;
 	struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
 	intel_engine_mask_t resetting_eng = dmlr ? ALL_ENGINES : engine_mask;
+	int pv_caps = vgpu_vreg_t(vgpu, vgtif_reg(pv_caps));
 
 	gvt_dbg_core("------------------------------------------\n");
 	gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n",
@@ -562,6 +564,7 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
 
 		intel_vgpu_reset_mmio(vgpu, dmlr);
 		populate_pvinfo_page(vgpu);
+		vgpu_vreg_t(vgpu, vgtif_reg(pv_caps)) = pv_caps;
 		intel_vgpu_reset_display(vgpu);
 
 		if (dmlr) {
-- 
1.8.3.1

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  parent reply	other threads:[~2019-07-23 11:32 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-23 11:31 [PATCH v8 0/9] i915 vgpu PV to improve vgpu performance Xiaolin Zhang
2019-07-23  3:14 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-07-23  3:17 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-07-23  3:35 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-23 11:31 ` [PATCH v8 1/9] drm/i915: introduced vgpu pv capability Xiaolin Zhang
2019-07-23  9:30   ` Chris Wilson
2019-07-24  1:49     ` Zhang, Xiaolin
2019-07-23 11:31 ` [PATCH v8 2/9] drm/i915: vgpu shared memory setup for pv optimization Xiaolin Zhang
2019-07-23 10:37   ` Chris Wilson
2019-07-24  2:17     ` Zhang, Xiaolin
2019-07-23 11:31 ` [PATCH v8 3/9] drm/i915: vgpu pv command buffer support Xiaolin Zhang
2019-07-23 11:31 ` [PATCH v8 4/9] drm/i915: vgpu ppgtt update pv optimization Xiaolin Zhang
2019-07-23 11:32 ` [PATCH v8 5/9] drm/i915: vgpu context submission " Xiaolin Zhang
2019-07-23 11:32 ` Xiaolin Zhang [this message]
2019-07-23 11:32 ` [PATCH v8 7/9] drm/i915/gvt: GVTg handle shared_page setup Xiaolin Zhang
2019-07-23 11:32 ` [PATCH v8 8/9] drm/i915/gvt: GVTg support ppgtt pv optimization Xiaolin Zhang
2019-07-23 11:32 ` [PATCH v8 9/9] drm/i915/gvt: GVTg support context submission " Xiaolin Zhang

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