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From: Gustavo Sousa <gustavo.sousa@intel.com>
To: Luca Coelho <luca@coelho.fi>, <intel-gfx@lists.freedesktop.org>,
	<intel-xe@lists.freedesktop.org>
Cc: Luca Coelho <luciano.coelho@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 07/13] drm/i915/dmc_wl: Check ranges specific to DC states
Date: Wed, 6 Nov 2024 10:56:56 -0300	[thread overview]
Message-ID: <173090141660.5449.3236805756186664237@intel.com> (raw)
In-Reply-To: <94f01bd839525f91706c848b8043ff981ca1c861.camel@coelho.fi>

Quoting Luca Coelho (2024-11-06 08:47:07-03:00)
>On Tue, 2024-11-05 at 10:00 -0300, Gustavo Sousa wrote:
>> Quoting Luca Coelho (2024-11-01 09:51:48-03:00)
>> > On Mon, 2024-10-21 at 19:27 -0300, Gustavo Sousa wrote:
>> > > There are extra registers that require the DMC wakelock when specific
>> > > dynamic DC states are in place. Add the table ranges for them and use
>> > > the correct table depending on the allowed DC states.
>> > > 
>> > > Bspec: 71583
>> > > Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>> > > ---
>> > >  drivers/gpu/drm/i915/display/intel_dmc_wl.c | 112 +++++++++++++++++++-
>> > >  1 file changed, 108 insertions(+), 4 deletions(-)
>> > > 
>> > > diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
>> > > index d597cc825f64..8bf2f32be859 100644
>> > > --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
>> > > +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
>> > > @@ -5,6 +5,7 @@
>> > >  
>> > >  #include <linux/kernel.h>
>> > >  
>> > > +#include "i915_reg.h"
>> > >  #include "intel_de.h"
>> > >  #include "intel_dmc.h"
>> > >  #include "intel_dmc_regs.h"
>> > > @@ -52,6 +53,87 @@ static struct intel_dmc_wl_range lnl_wl_range[] = {
>> > >          {},
>> > >  };
>> > 
>> > Do we still need the lnl_wl_range[]? This was sort of a place-holder
>> > with a very large range just for testing.  I can see that there are at
>> > least some ranges in common between lnl_wl_range[] and the new range
>> > tables defined below.
>> 
>> Yes, although we could do some homework to get a more accurate set of
>> ranges.
>> 
>> Now, about the different tables:
>> 
>>  - lnl_wl_range should be about ranges of registers that are powered
>>    down during DC states and that the HW requires DC exit for proper
>>    access.
>>  - xe3lpd_{dc5_dc6,dc3co}_wl_ranges are registers that are touched by
>>    the DMC and need the wakelock for properly restoring the correct
>>    value before accessing them.
>> 
>> Maybe a comment in the code explaining the above is warranted?
>
>I think a better naming for the arrays is warranted. :) Wouldn't
>changing lnl_wl_range to base_wl_range or so be better? My point is
>that LNL is not related at all here (anymore).

Yep, we could come up with better names for those variables. I went
with:

    s/lnl_wl_range/powered_off_ranges/
    s/xe3lpd_dc3co_wl_ranges/xe3lpd_dc3co_dmc_ranges/
    s/xe3lpd_dc5_dc6_wl_ranges/xe3lpd_dc5_dc6_dmc_ranges/

And also added comments to differentiate their purposes.

--
Gustavo Sousa

>
>
>> > > +static struct intel_dmc_wl_range xe3lpd_dc5_dc6_wl_ranges[] = {
>> > > +        { .start = 0x45500, .end = 0x45500 }, /* DC_STATE_SEL */
>> > > +        { .start = 0x457a0, .end = 0x457b0 }, /* DC*_RESIDENCY_COUNTER */
>> > > +        { .start = 0x45504, .end = 0x45504 }, /* DC_STATE_EN */
>> > > +        { .start = 0x45400, .end = 0x4540c }, /* PWR_WELL_CTL_* */
>> > > +        { .start = 0x454f0, .end = 0x454f0 }, /* RETENTION_CTRL */
>> > > +
>> > > +        /* DBUF_CTL_* */
>> > > +        { .start = 0x44300, .end = 0x44300 },
>> > > +        { .start = 0x44304, .end = 0x44304 },
>> > > +        { .start = 0x44f00, .end = 0x44f00 },
>> > > +        { .start = 0x44f04, .end = 0x44f04 },
>> > > +        { .start = 0x44fe8, .end = 0x44fe8 },
>> > > +        { .start = 0x45008, .end = 0x45008 },
>> > > +
>> > > +        { .start = 0x46070, .end = 0x46070 }, /* CDCLK_PLL_ENABLE */
>> > > +        { .start = 0x46000, .end = 0x46000 }, /* CDCLK_CTL */
>> > > +        { .start = 0x46008, .end = 0x46008 }, /* CDCLK_SQUASH_CTL */
>> > > +
>> > > +        /* TRANS_CMTG_CTL_* */
>> > > +        { .start = 0x6fa88, .end = 0x6fa88 },
>> > > +        { .start = 0x6fb88, .end = 0x6fb88 },
>> > 
>> > These, for instance, are part of lnl_wl_range[].
>> 
>> Given my clarification above about the different purposes of the ranges,
>> I think we should stick to keeping the same values from the (soon to
>> be?) documented tables, even if there is some small redundancy.
>> Otherwise we would require the programmer to remember to check ranges in
>> the "more general" table every time a DC state-specific one needs to be
>> added or updated.
>
>Makes sense, I guess it's okay that the base table and the specialized
>tables are slightly redundant then.
>
>--
>Cheers,
>Luca.

  reply	other threads:[~2024-11-06 14:00 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-21 22:27 [PATCH 00/13] drm/i915/dmc_wl: Fixes and enablement for Xe3_LPD Gustavo Sousa
2024-10-21 22:27 ` [PATCH 01/13] drm/xe: Mimic i915 behavior for non-sleeping MMIO wait Gustavo Sousa
2024-11-01 10:57   ` Luca Coelho
2024-11-05 12:17     ` Gustavo Sousa
2024-10-21 22:27 ` [PATCH 02/13] drm/i915/dmc_wl: Use non-sleeping variant of " Gustavo Sousa
2024-10-22  9:34   ` Jani Nikula
2024-10-22 10:55     ` Gustavo Sousa
2024-11-01 11:04       ` Luca Coelho
2024-11-01 11:18   ` Luca Coelho
2024-10-21 22:27 ` [PATCH 03/13] drm/i915/dmc_wl: Check for non-zero refcount in release work Gustavo Sousa
2024-11-01 11:48   ` Luca Coelho
2024-10-21 22:27 ` [PATCH 04/13] drm/i915/dmc_wl: Get wakelock when disabling dynamic DC states Gustavo Sousa
2024-11-01 12:24   ` Luca Coelho
2024-11-05 12:44     ` Gustavo Sousa
2024-11-06 11:37       ` Luca Coelho
2024-10-21 22:27 ` [PATCH 05/13] drm/i915/dmc_wl: Use sentinel item for range tables Gustavo Sousa
2024-11-01 12:25   ` Luca Coelho
2024-10-21 22:27 ` [PATCH 06/13] drm/i915/dmc_wl: Extract intel_dmc_wl_addr_in_range() Gustavo Sousa
2024-10-21 22:27 ` [PATCH 07/13] drm/i915/dmc_wl: Check ranges specific to DC states Gustavo Sousa
2024-10-22  8:03   ` Jani Nikula
2024-10-22 11:06     ` Gustavo Sousa
2024-11-05 19:54     ` Gustavo Sousa
2024-10-22  8:03   ` Jani Nikula
2024-10-22 11:10     ` Gustavo Sousa
2024-10-22 11:14   ` Gustavo Sousa
2024-11-01 12:51   ` Luca Coelho
2024-11-05 13:00     ` Gustavo Sousa
2024-11-06 11:47       ` Luca Coelho
2024-11-06 13:56         ` Gustavo Sousa [this message]
2024-10-21 22:27 ` [PATCH 08/13] drm/i915/dmc_wl: Allow simpler syntax for single reg in range tables Gustavo Sousa
2024-11-01 12:58   ` Luca Coelho
2024-11-05 13:42     ` Gustavo Sousa
2024-11-06 12:23       ` Luca Coelho
2024-11-06 12:29         ` Gustavo Sousa
2024-11-06 12:35           ` Luca Coelho
2024-10-21 22:27 ` [PATCH 09/13] drm/i915/dmc_wl: Deal with existing references when disabling Gustavo Sousa
2024-11-01 14:17   ` Luca Coelho
2024-10-21 22:27 ` [PATCH 10/13] drm/i915/dmc_wl: Couple enable/disable with dynamic DC states Gustavo Sousa
2024-11-01 14:19   ` Luca Coelho
2024-10-21 22:27 ` [PATCH 11/13] drm/i915/dmc_wl: Add and use HAS_DMC_WAKELOCK() Gustavo Sousa
2024-10-22  9:37   ` Jani Nikula
2024-10-22 11:03     ` Gustavo Sousa
2024-11-05 13:56       ` Gustavo Sousa
2024-11-06  9:25         ` Jani Nikula
2024-11-06 13:24           ` Gustavo Sousa
2024-10-21 22:27 ` [PATCH 12/13] drm/i915/dmc_wl: Sanitize enable_dmc_wl according to hardware support Gustavo Sousa
2024-11-01 14:25   ` Luca Coelho
2024-10-21 22:27 ` [PATCH 13/13] drm/i915/xe3lpd: Use DMC wakelock by default Gustavo Sousa
2024-11-01 14:27   ` Luca Coelho
2024-11-05 13:46     ` Gustavo Sousa
2024-11-05 21:12       ` Gustavo Sousa
2024-11-06 12:27         ` Luca Coelho
2024-10-21 22:54 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dmc_wl: Fixes and enablement for Xe3_LPD Patchwork
2024-10-21 22:54 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-21 23:44 ` ✗ Fi.CI.BAT: failure " Patchwork

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