Re: [PATCH v5 0/3] drm/i915/xe3lpd: Update bandwidth parameters

[Gustavo Sousa <gustavo.sousa@intel.com>]

Quoting Gustavo Sousa (2025-03-11 14:04:49-03:00)
>Bandwidth parameters for Xe3_LPD have been updated with respect to
>previous display releases. Encode them into xe3lpd_sa_info and use that
>new struct.
>
>Since we are touching intel_bw.c, also take the opportunity convert it
>to intel_display.
>
>Changes in v2:
>  - Fix typo in patch #2.
>
>Changes in v3:
>- Squash patches #1 and #2 into a single one and modify it to convert
>  intel_bw.c internally to intel_display (new patch subject is
>  "drm/i915/display: Convert intel_bw.c internally to intel_display").
>- Add a new patch #2 to convert intel_bw.c externally to intel_display.
>- Link to v2: https://lore.kernel.org/r/20250217153550.43909-1-gustavo.sousa@intel.com
>
>Changes in v4:
>- Prefer intel_uncore_read() for MCHBAR registers. (Ville)
>- Link to v3: https://lore.kernel.org/r/20250307-xe3lpd-bandwidth-update-v3-0-58bbe81f65bf@intel.com
>
>Changes in v5:
>- Do not include intel_de.h anymore. (Ville)
>- Link to v4: https://lore.kernel.org/r/20250310-xe3lpd-bandwidth-update-v4-0-4191964b034d@intel.com

Pushed to drm-intel-next. Thank you all for the reviews/feedback!

--
Gustavo Sousa