Re: [RFC] drm/i915: context support unit test-r2

[Ben Widawsky <bwidawsk@gmail.com>]

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Attaching a new version of the test which I think demonstrates the
context usage better (it calls execbuffer twice, the second time not
using relocations on the src and dest buffers).

Ben

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/*
 * Copyright © 2011 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 */

#include "drmtest.h"
#include "intel_batchbuffer.h"
#include "intel_gpu_tools.h"
#include "drm.h"
#include "i915_drm.h"
#include "intel_bufmgr.h"
#include "intel_context.h"

static drm_intel_bufmgr *bufmgr;
static drm_intel_ctx *ctx;
struct intel_batchbuffer *batch;

/* Would normally malloc this */
#define MAX_BOS_PER_BATCH 2
static drm_intel_ctx_flags ctx_flags[MAX_BOS_PER_BATCH];

#define RSVD_BUF_SLOT 0
#define SRC_BUF_SLOT 1
#define DEST_BUF_SLOT 2

/* XXX: We'll turn on ppgtt, but it's real usage won't get until gen7 */
#undef USE_PPGTT

static void
fill_ctx_bo_data(int which, drm_intel_bo *bo, int slot, unsigned long addr)
{
	if (addr != 0) {
		printf("Warning, PPGTT/user controlled relocations are not yet"
		       " supported\n");
	}

	/* XXX: reference to the bo handle */
	ctx_flags[which].handle = bo->handle;
	/* XXX: which slot the dest buffer refers to in the context */
	ctx_flags[which].slot = slot;
	/* XXX: place to put the buffer (ppgtt only) */
	ctx_flags[which].offset = addr;
	/* XXX: domains */
	ctx_flags[which].read_domain = I915_GEM_DOMAIN_RENDER;
	ctx_flags[which].write_domain = 0;

	/* XXX: what else? */
	//drm_intel_ctx_set_cmd(&ctx_flags[which], CTX_BUF_ASSOCIATE);
	ctx_flags[which].command = I915_CTX_ASSOC_BUF;
}

static void
blit(drm_intel_bo *src_bo, drm_intel_bo *dest_bo)
{
	uint32_t src_pitch = 512, dst_pitch = 512;
	uint32_t cmd_bits = 0;

	/* XXX: populate context info for the src and dest buffers */
	fill_ctx_bo_data(0, dest_bo, DEST_BUF_SLOT, 0x1000);
	fill_ctx_bo_data(1, src_bo, SRC_BUF_SLOT, 0x8000);
	/* XXX: associate the flags per bo with the context */
	drm_intel_ctx_set_flags(ctx, ctx_flags, 2);

	BEGIN_BATCH(8);
	OUT_BATCH(XY_SRC_COPY_BLT_CMD |
		  XY_SRC_COPY_BLT_WRITE_ALPHA |
		  XY_SRC_COPY_BLT_WRITE_RGB |
		  cmd_bits);
	OUT_BATCH((3 << 24) | /* 32 bits */
		  (0xcc << 16) | /* copy ROP */
		  dst_pitch);
	OUT_BATCH(0); /* dst x1,y1 */
	OUT_BATCH((64 << 16) | 64); /* 64x64 blit */
#ifdef USE_PPGTT
	OUT_BATCH(ctx_flags[0].addr);
#else
	OUT_RELOC(dest_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
#endif
	OUT_BATCH(0); /* src x1,y1 */
	OUT_BATCH(src_pitch);
#ifdef USE_PPGTT
	OUT_BATCH(ctx_flags[1].addr);
#else
	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
#endif
	ADVANCE_BATCH();

	/* XXX: new flush with context data, where ctx has a pointer
	 * to the array of information per buffer object
	 */
	intel_batchbuffer_flush_with_ctx(batch, ctx);
}

/* Do the blit with previously assigned context */
static void
blit_no_ass(drm_intel_bo *src_bo, drm_intel_bo *dest_bo)
{
	uint32_t src_pitch = 512, dst_pitch = 512;
	uint32_t cmd_bits = 0;

	/* XXX: no more per context flags */
	drm_intel_ctx_set_flags(ctx, NULL, 0);
	BEGIN_BATCH(8);
	OUT_BATCH(XY_SRC_COPY_BLT_CMD |
		  XY_SRC_COPY_BLT_WRITE_ALPHA |
		  XY_SRC_COPY_BLT_WRITE_RGB |
		  cmd_bits);
	OUT_BATCH((3 << 24) | /* 32 bits */
		  (0xcc << 16) | /* copy ROP */
		  dst_pitch);
	OUT_BATCH(0); /* dst x1,y1 */
	OUT_BATCH((64 << 16) | 64); /* 64x64 blit */
	OUT_BATCH(ctx_flags[0].offset);
	OUT_BATCH(0); /* src x1,y1 */
	OUT_BATCH(src_pitch);
	OUT_BATCH(ctx_flags[1].offset);
	ADVANCE_BATCH();

	intel_batchbuffer_flush_with_ctx(batch, ctx);
}

int main(int argc, char **argv)
{
	drm_intel_bo *src, *dest;

	int fd;

	const unsigned int aperture_size = 64 * 1024 * 1024;
	/* XXX rsvd slot + src slot + dest slot */
	const int ctx_bo_slots = 3;

	fd = drm_open_any();

	bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
	drm_intel_bufmgr_set_debug(bufmgr, 1);
	drm_intel_bufmgr_gem_enable_reuse(bufmgr);

	/* XXX: Create a new context for our work 64MB aperture, 3 slots*/
	ctx = drm_intel_ctx_gem_init(bufmgr, aperture_size, ctx_bo_slots);
	if (ctx == NULL)
		return -1;

	batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));

	src = drm_intel_bo_alloc(bufmgr, "src", 128 * 128, 4096);
	dest = drm_intel_bo_alloc(bufmgr, "dest", 128 * 128, 4096);

	blit(src, dest);
	blit_no_ass(src, dest);

	intel_batchbuffer_free(batch);
	drm_intel_ctx_gem_destroy(ctx);
	drm_intel_bufmgr_destroy(bufmgr);

	close(fd);

	return 0;
}

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