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From: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [RFC] drm/i915: check FDI config for 3 pipe
Date: Wed, 18 Apr 2012 15:27:44 -0700	[thread overview]
Message-ID: <20120418152744.649c2970@jbarnes-desktop> (raw)
In-Reply-To: <20120418142536.1457193c@jbarnes-desktop>

On Wed, 18 Apr 2012 14:25:36 -0700
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> Three pipe can only be enabled in some cases and updated docs indicate
> a bit to control FDI B+C sharing.
> 
> This patch adds a check to make sure we can support a given config with
> the existing FDI lane configuration, and tries to set the bit as
> appropriate.
> 
> We may want to go further though and just totally break the link
> between our pipes, planes, PLLs, FDI lanes, transcoders, etc and the
> CRTCs we expose to userspace.  We could theoretically just allocate new
> ones every mode set.  That wouldn't help a whole lot though since we
> don't get full configuration changes from userspace, just a small
> window of CRTC data with no idea of what might happen next...

Ah just found a bug in reviewing my own patch here.

+	if (intel_crtc->pipe > 1) {
+		if (intel_crtc->fdi_lanes > 2)
+			I915_WRITE(SOUTH_CHICKEN1, I915_READ(SOUTH_CHICKEN1) &
+				   ~FDIBC_LANE_SHARE_EN);
+		else
+			I915_WRITE(SOUTH_CHICKEN1, I915_READ(SOUTH_CHICKEN1) |
+				   FDIBC_LANE_SHARE_EN);
+	}

Should be if (intel_crtc->pipe > 0) since we need to apply this when
either FDI C *or* B changes config.

I'll try, maybe it'll help with the funky 3 pipe config mode set
problem I saw.

-- 
Jesse Barnes, Intel Open Source Technology Center

  reply	other threads:[~2012-04-18 22:27 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-04-18 21:25 [RFC] drm/i915: check FDI config for 3 pipe Jesse Barnes
2012-04-18 22:27 ` Jesse Barnes [this message]
2012-04-18 22:32   ` Jesse Barnes

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