From: Daniel Vetter <daniel@ffwll.ch>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 7/7] drm/i915: VLV VGA port only handles on & off, like PCH VGA
Date: Wed, 13 Jun 2012 10:36:06 +0200 [thread overview]
Message-ID: <20120613083606.GE4829@phenom.ffwll.local> (raw)
In-Reply-To: <1339537655-5792-8-git-send-email-jbarnes@virtuousgeek.org>
On Tue, Jun 12, 2012 at 02:47:35PM -0700, Jesse Barnes wrote:
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Meh, nicely splitting out pch_crt_dpms and now this. Disappointing ;-)
But I guess we've reached the limit of the dpms helpers anyway, and with a
few changes in drm_crtc_helper.c to fix up a few past mistakes we can make
the dpms handling part fully optional and replace it with something else
that fits us better. Sometimes, maybe.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_crt.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> index 1333a65..ac62f24 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -88,6 +88,9 @@ static void gmch_crt_dpms(struct drm_encoder *encoder, int mode)
> temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
> temp &= ~ADPA_DAC_ENABLE;
>
> + if (IS_VALLEYVIEW(dev) && mode != DRM_MODE_DPMS_ON)
> + mode = DRM_MODE_DPMS_OFF;
> +
> switch (mode) {
> case DRM_MODE_DPMS_ON:
> temp |= ADPA_DAC_ENABLE;
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48
prev parent reply other threads:[~2012-06-13 8:34 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-12 21:47 Remaining VLV patches Jesse Barnes
2012-06-12 21:47 ` [PATCH 1/7] drm/i915: ValleyView mode setting limits and PLL functions Jesse Barnes
2012-06-13 8:06 ` Daniel Vetter
2012-06-13 15:04 ` Purushothaman, Vijay A
2012-06-12 21:47 ` [PATCH 2/7] drm/i915: Enable DP panel power sequencing for ValleyView Jesse Barnes
2012-06-13 8:05 ` Daniel Vetter
2012-06-13 16:10 ` Shobhit Kumar
2012-06-12 21:47 ` [PATCH 3/7] drm/i915: add ValleyView specific CRT detect function Jesse Barnes
2012-06-12 21:47 ` [PATCH 4/7] drm/i915: add HDMI and DP port enumeration on ValleyView Jesse Barnes
2012-06-13 8:11 ` Daniel Vetter
2012-06-13 17:19 ` Jesse Barnes
2012-06-12 21:47 ` [PATCH 5/7] drm/i915: access VLV regs through read/write switch Jesse Barnes
2012-06-13 8:14 ` Daniel Vetter
2012-06-12 21:47 ` [PATCH 6/7] drm/i915: bind driver to ValleyView chipsets Jesse Barnes
2012-06-12 21:47 ` [PATCH 7/7] drm/i915: VLV VGA port only handles on & off, like PCH VGA Jesse Barnes
2012-06-13 8:36 ` Daniel Vetter [this message]
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