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From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: disable flushing_list/gpu_write_list
Date: Wed, 20 Jun 2012 13:55:33 +0200	[thread overview]
Message-ID: <20120620115533.GE7170@phenom.ffwll.local> (raw)
In-Reply-To: <1339621547_17708@CP5-2952>

On Wed, Jun 13, 2012 at 10:05:39PM +0100, Chris Wilson wrote:
> On Wed, 13 Jun 2012 20:45:19 +0200, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> > This is just the minimal patch to disable all this code so that we can
> > do decent amounts of QA before we rip it all out.
> > 
> > The complicating thing is that we need to flush the gpu caches after
> > the batchbuffer is emitted. Which is past the point of no return where
> > execbuffer can't fail any more (otherwise we risk submitting the same
> > batch multiple times).
> > 
> > Hence we need to add a flag to track whether any caches associated
> > with that ring are dirty. And emit the flush in add_request if that's
> > the case.
> > 
> > Note that this has a quite a few behaviour changes:
> > - Caches get flushed/invalidated unconditionally.
> > - Invalidation now happens after potential inter-ring sync.
> > 
> > I've bantered around a bit with Chris on irc whether this fixes
> > anything, and it might or might not. The only thing clear is that with
> > these changes it's much easier to reason about correctness.
> > 
> > Also rip out a lone get_next_request_seqno in the execbuffer
> > retire_commands function. I've dug around and I couldn't figure out
> > why that is still there, with the outstanding lazy request stuff it
> > shouldn't be necessary.
> > 
> > v2: Chris Wilson complained that I also invalidate the read caches
> > when flushing after a batchbuffer. Now optimized.
> > 
> > v3: Added some comments to explain the new flushing behaviour.
> > 
> > Cc: Eric Anholt <eric@anholt.net>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> This seems to work fine for 2D workloads, so
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

Ok, after testing this again on my snb with the context stuff applied I've
queued this up for -next. Let's see how well it fares ;-)

Thanks for your review.
-Daniel
-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48

      reply	other threads:[~2012-06-20 11:54 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-13 18:45 [PATCH] drm/i915: disable flushing_list/gpu_write_list Daniel Vetter
2012-06-13 21:05 ` Chris Wilson
2012-06-20 11:55   ` Daniel Vetter [this message]

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