Re: [PATCH 1/3] drm/i915: Flush the context object from the CPU caches upon switching

[Daniel Vetter <daniel@ffwll.ch>]

On Sun, Jul 15, 2012 at 12:34:22PM +0100, Chris Wilson wrote:
> The issue is that we stale data in the CPU caches, when we come to
> swap-out the object, the CPU may short-circuit the reads from those
> cacheline and so corrupt the context object.
> 
> Secondary, leaving the context object as being marked in the CPU write
> domain whilst on the GPU active list is a bad idea and will throw
> warnings later.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/i915_gem_context.c |    7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 9ae3f2c..fd978bb 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -374,6 +374,13 @@ static int do_switch(struct drm_i915_gem_object *from_obj,
>  	if (ret)
>  		return ret;
>  
> +	/* Clear this page out of any CPU caches for coherent swap-in/out */
> +	ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
> +	if (ret) {
> +		i915_gem_object_unpin(to->obj);
> +		return ret;
> +	}
> +

Do I understand things correctly that thanks to clever use of
set_to_gtt_domain with write = false and not setting a write_domain when
moving the old context object to the active list we won't block? If so,
I'll add a short note to that effect to the commit message when merging.

And given that we have similar clever interface abuse in the pwrite/pread
code, some code rework is in order I guess. We could replace all that
domain tracking with bool gpu_coherent would be simpler (after the
flushing_list's permanent demise, of course).
-Daniel

>  	if (!to->obj->has_global_gtt_mapping)
>  		i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
>  
> -- 
> 1.7.10.4
> 
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-- 
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48