From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/4] drm/i915: Only apply the mb() when flushing the GTT domain during a finish
Date: Thu, 11 Oct 2012 12:43:42 -0700 [thread overview]
Message-ID: <20121011124342.4102105a@jbarnes-desktop> (raw)
In-Reply-To: <1349807080-9005-2-git-send-email-chris@chris-wilson.co.uk>
On Tue, 9 Oct 2012 19:24:38 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Now that we seem to have brought order to the GTT barriers, the last one
> to review is the terminal barrier before we unbind the buffer from the
> GTT. This needs to only be performed if the buffer still resides in the
> GTT domain, and so we can skip some needless barriers otherwise.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 3c4577b..ed8d21a 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2526,15 +2526,15 @@ static void i915_gem_object_finish_gtt(struct drm_i915_gem_object *obj)
> {
> u32 old_write_domain, old_read_domains;
>
> - /* Act a barrier for all accesses through the GTT */
> - mb();
> -
> /* Force a pagefault for domain tracking on next user access */
> i915_gem_release_mmap(obj);
>
> if ((obj->base.read_domains & I915_GEM_DOMAIN_GTT) == 0)
> return;
>
> + /* Wait for any direct GTT access to complete */
> + mb();
> +
> old_read_domains = obj->base.read_domains;
> old_write_domain = obj->base.write_domain;
>
Yeah this looks like a better place to put it. You're trying to
serialize this against a subsequent fence or map operation?
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2012-10-11 19:43 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <6c3329lntgg@orsmga002.jf.intel.com>
2012-10-09 18:24 ` [PATCH 1/4] drm/i915: Only insert the mb() before updating the fence parameter Chris Wilson
2012-10-09 18:24 ` [PATCH 2/4] drm/i915: Only apply the mb() when flushing the GTT domain during a finish Chris Wilson
2012-10-11 19:43 ` Jesse Barnes [this message]
2013-01-19 13:40 ` Daniel Vetter
2012-10-09 18:24 ` [PATCH 3/4] drm/i915: Insert a full mb() before reading the seqno from the status page Chris Wilson
2012-10-11 19:46 ` Jesse Barnes
2012-10-19 20:40 ` Chris Wilson
2012-10-19 20:52 ` Jesse Barnes
2013-01-19 12:02 ` Chris Wilson
2012-10-09 18:24 ` [PATCH 4/4] drm/i915: Review the memory barriers around CPU access to buffers Chris Wilson
2012-10-11 19:52 ` Jesse Barnes
2012-10-19 20:48 ` Chris Wilson
2012-10-11 20:46 ` Daniel Vetter
2012-10-11 19:41 ` [PATCH 1/4] drm/i915: Only insert the mb() before updating the fence parameter Jesse Barnes
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