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From: Daniel Vetter <daniel@ffwll.ch>
To: Ben Widawsky <ben@bwidawsk.net>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
	"Runyan, Arthur J" <arthur.j.runyan@intel.com>
Subject: Re: [PATCH] drm/i915: detect wrong MCH watermark values
Date: Tue, 12 Feb 2013 14:44:14 +0100	[thread overview]
Message-ID: <20130212134414.GC5813@phenom.ffwll.local> (raw)
In-Reply-To: <20130209202401.GA8121@lundgren.kumite>

On Sat, Feb 09, 2013 at 12:24:02PM -0800, Ben Widawsky wrote:
> On Sat, Feb 09, 2013 at 09:03:42PM +0100, Daniel Vetter wrote:
> > Some early bios versions seem to ship with the wrong tuning values for
> > the MCH, possible resulting in pipe underruns under load. Especially
> > on DP outputs this can lead to black screen, since DP really doesn't
> > like an occasional whack from an underrun.
> > 
> > Unfortunately the registers seem to be locked after boot, so the only
> > thing we can do is politely point out issues and suggest a BIOS
> > upgrade.
> > 
> > Arthur Runyan pointed us at this issue while discussion DP bugs - thus
> > far no confirmation from a bug report yet that it helps. But at least
> > some of my machines here have wrong values, so this might be useful in
> > understanding bug reports.
> > 
> > v2: After a bit more discussion with Art and Ben we've decided to only
> > the check the watermark values, since the OREF ones could be be a
> > notch more aggressive on certain machines.
> > 
> > Cc: Ben Widawsky <ben@bwidawsk.net>
> > Cc: Runyan, Arthur J <arthur.j.runyan@intel.com>
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> I wouldn't mind if you printed the OREF values, even if you didn't use
> them to detect.

They're different already on my machine than the most conservative
recommended values, so I've thought it'll be of little value to us. If the
hw guys need them, we can always ask reporters for it.

> But,
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>

Thanks for the review, patch merged.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

      reply	other threads:[~2013-02-12 13:42 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-02-07 14:23 [PATCH] drm/i915: implement MCH pipe underrun prevention for snb/ivb Daniel Vetter
2013-02-07 18:09 ` Ben Widawsky
2013-02-09 20:03   ` [PATCH] drm/i915: detect wrong MCH watermark values Daniel Vetter
2013-02-09 20:24     ` Ben Widawsky
2013-02-12 13:44       ` Daniel Vetter [this message]

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