From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: imre.deak@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/13] drm/i915: Skip modifying PCH DREF if not changing clock sources
Date: Tue, 26 Mar 2013 15:57:08 -0700 [thread overview]
Message-ID: <20130326155708.2f68b2f4@jbarnes-desktop> (raw)
In-Reply-To: <1363781820.13528.11.camel@intelbox>
On Wed, 20 Mar 2013 14:17:00 +0200
Imre Deak <imre.deak@intel.com> wrote:
> On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> > From: Chris Wilson <chris@chris-wilson.co.uk>
> >
> > Modifying the clock sources (via the DREF control on the PCH) is a slow
> > multi-stage process as we need to let the clocks stabilise between each
> > stage. If we are not actually changing the clock sources, then we can
> > return early.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 83 +++++++++++++++++++++++++---------
> > 1 file changed, 61 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 3e6dadf..f20555e 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -4758,7 +4758,7 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > struct drm_mode_config *mode_config = &dev->mode_config;
> > struct intel_encoder *encoder;
> > - u32 temp;
> > + u32 val, final;
> > bool has_lvds = false;
> > bool has_cpu_edp = false;
> > bool has_pch_edp = false;
> > @@ -4801,70 +4801,109 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
> > * PCH B stepping, previous chipset stepping should be
> > * ignoring this setting.
> > */
> > - temp = I915_READ(PCH_DREF_CONTROL);
> > + val = I915_READ(PCH_DREF_CONTROL);
> > +
> > + /* As we must carefully and slowly disable/enable each source in turn,
> > + * compute the final state we want first and check if we need to
> > + * make any changes at all.
> > + */
> > + final = val;
> > + final &= ~DREF_NONSPREAD_SOURCE_MASK;
> > + if (has_ck505)
> > + final |= DREF_NONSPREAD_CK505_ENABLE;
> > + else
> > + final |= DREF_NONSPREAD_SOURCE_ENABLE;
> > +
> > + final &= ~DREF_SSC_SOURCE_MASK;
> > + final &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
> > + final &= ~DREF_SSC1_ENABLE;
> > +
> > + if (has_panel) {
> > + final |= DREF_SSC_SOURCE_ENABLE;
> > +
> > + if (intel_panel_use_ssc(dev_priv) && can_ssc)
> > + final |= DREF_SSC1_ENABLE;
> > +
> > + if (has_cpu_edp) {
> > + if (intel_panel_use_ssc(dev_priv) && can_ssc)
> > + final |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD;
> > + else
> > + final |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;
> > + } else
> > + final |= DREF_CPU_SOURCE_OUTPUT_DISABLE;
> > + } else {
> > + final |= DREF_SSC_SOURCE_DISABLE;
> > + final |= DREF_CPU_SOURCE_OUTPUT_DISABLE;
> > + }
>
> This would be clearer in a separate function with a 'check_only' flag,
> then we could do away with the code below.
Yeah, it would shorten things a bit, but since we only have one caller
right now I'll leave that cleanup alone.
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2013-03-26 22:56 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-19 21:31 More fastboot bits Jesse Barnes
2013-02-19 21:31 ` [PATCH 01/13] drm/i915: Skip modifying PCH DREF if not changing clock sources Jesse Barnes
2013-03-20 12:17 ` Imre Deak
2013-03-26 22:57 ` Jesse Barnes [this message]
2013-02-19 21:31 ` [PATCH 02/13] drm/i915: Introduce i915_gem_object_create_stolen_for_preallocated Jesse Barnes
2013-03-26 19:46 ` Daniel Vetter
2013-03-26 20:58 ` Jesse Barnes
2013-02-19 21:31 ` [PATCH 03/13] drm/i915: Split the framebuffer_info creation into a separate routine Jesse Barnes
2013-03-20 12:23 ` Imre Deak
2013-03-26 23:07 ` Jesse Barnes
2013-03-27 11:49 ` Imre Deak
2013-03-27 13:48 ` Chris Wilson
2013-02-19 21:31 ` [PATCH 04/13] drm: add initial_config function to fb helper Jesse Barnes
2013-03-26 20:34 ` Daniel Vetter
2013-03-26 20:52 ` Chris Wilson
2013-03-26 20:57 ` Jesse Barnes
2013-02-19 21:31 ` [PATCH 05/13] drm/i915: Wrap the preallocated BIOS framebuffer and preserve for KMS fbcon Jesse Barnes
2013-03-20 12:31 ` Imre Deak
2013-03-26 23:20 ` Jesse Barnes
2013-02-19 21:31 ` [PATCH 06/13] drm/i915: Retrieve the current mode upon KMS takeover Jesse Barnes
2013-03-20 12:36 ` Imre Deak
2013-03-26 23:24 ` Jesse Barnes
2013-03-26 23:52 ` Daniel Vetter
2013-03-26 23:59 ` Jesse Barnes
2013-02-19 21:31 ` [PATCH 07/13] drm/i915: Only preserve the BIOS modes if they are the preferred ones Jesse Barnes
2013-02-19 21:31 ` [PATCH 08/13] drm/i915: Validate that the framebuffer accommodates the current mode Jesse Barnes
2013-02-19 21:31 ` [PATCH 09/13] drm/i915: fix build in intel_display.c Jesse Barnes
2013-03-20 12:41 ` Imre Deak
2013-03-26 23:26 ` Jesse Barnes
2013-02-19 21:31 ` [PATCH 10/13] drm/i915: check panel fit status at update_plane time Jesse Barnes
2013-03-20 12:46 ` Imre Deak
2013-02-19 21:31 ` [PATCH 11/13] drm/i915: add clock_get for ironlake+ Jesse Barnes
2013-03-20 12:48 ` Imre Deak
2013-03-26 23:29 ` Jesse Barnes
2013-02-19 21:31 ` [PATCH 12/13] drm/i915: treat no fb -> fb as simple flip instead of full mode set Jesse Barnes
2013-02-19 21:31 ` [PATCH 13/13] drm/i915: check for non-native modes when inheriting a BIOS fb Jesse Barnes
2013-03-20 12:51 ` Imre Deak
2013-03-26 23:29 ` Jesse Barnes
2013-03-20 12:15 ` More fastboot bits Imre Deak
2013-03-20 15:20 ` Jesse Barnes
-- strict thread matches above, loose matches on Subject: below --
2013-04-02 17:03 Updated " Jesse Barnes
2013-04-02 17:03 ` [PATCH 01/13] drm/i915: Skip modifying PCH DREF if not changing clock sources Jesse Barnes
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