From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v2] drm/i915: HSW: allow PCH clock gating for suspend
Date: Thu, 9 May 2013 23:05:00 +0200 [thread overview]
Message-ID: <20130509210459.GA12292@phenom.ffwll.local> (raw)
In-Reply-To: <CA+gsUGS7tQuidsnSC3vZu39Yag0BBSg1Q41FR9fMN2FpUoSZ4A@mail.gmail.com>
On Wed, Apr 17, 2013 at 04:05:10PM -0300, Paulo Zanoni wrote:
> Hi
>
> 2013/4/17 Imre Deak <imre.deak@intel.com>:
> > For the device to enter D3 we should enable PCH clock gating.
> >
> > v2:
> > - use HAS_PCH_LPT instead of IS_HASWELL (Ville, Paolo)
> > - rename lpt_allow_clock_gating to lpt_suspend_hw (Paolo)
> >
>
> s/Paolo/Paulo/ :)
> Besides this, the patch looks fine. But I can't test it right now
> since suspend seems to be broken on my machine, even with nomodeset.
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Paulo poked me about this on irc, so queued for -next, thanks for the
patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
prev parent reply other threads:[~2013-05-09 21:02 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-16 11:25 [PATCH] drm/i915: HSW: allow PCH clock gating for suspend Imre Deak
2013-04-16 11:35 ` Ville Syrjälä
2013-04-16 11:43 ` Imre Deak
2013-04-16 17:50 ` Paulo Zanoni
2013-04-16 19:53 ` Imre Deak
2013-04-17 11:04 ` [PATCH v2] " Imre Deak
2013-04-17 19:05 ` Paulo Zanoni
2013-04-17 20:15 ` Imre Deak
2013-05-09 21:05 ` Daniel Vetter [this message]
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