From: Daniel Vetter <daniel@ffwll.ch>
To: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 9/9] drm/i915: Enable pipe gamma for sprites
Date: Thu, 21 Nov 2013 09:10:58 +0100 [thread overview]
Message-ID: <20131121081058.GH27344@phenom.ffwll.local> (raw)
In-Reply-To: <CABVU7+v+yTO3QXrbJLvSz4qqKdBgpUAwkpNE5qG1VWY2BtKQWQ@mail.gmail.com>
On Tue, Nov 19, 2013 at 09:42:55AM -0800, Rodrigo Vivi wrote:
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
>
> On Mon, Nov 18, 2013 at 6:32 PM, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We send the primary and cursor plane data through the gamma unit.
> > In order to get matching output from sprites, also send the sprite
> > data through the gamma unit.
> >
> > In the future we should add some properties to control this
> > explicitly, and also add properties for the per-sprite gamma ramps
> > what have you, but for now this seems like a reasonable thing to do.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Eventually we want testcases for this, but I think that's only really
useful once we expose a "bypasss gamma" or similar property. And that is
best done together with exposing all the other csc stuff I'd say. So
merged.
-Daniel
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 2 +-
> > drivers/gpu/drm/i915/intel_sprite.c | 18 ++++++++++++++++++
> > 2 files changed, 19 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 8f4916d..7b454d2 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -3745,7 +3745,7 @@
> >
> > #define _SPACNTR (VLV_DISPLAY_BASE + 0x72180)
> > #define SP_ENABLE (1<<31)
> > -#define SP_GEAMMA_ENABLE (1<<30)
> > +#define SP_GAMMA_ENABLE (1<<30)
> > #define SP_PIXFORMAT_MASK (0xf<<26)
> > #define SP_FORMAT_YUV422 (0<<26)
> > #define SP_FORMAT_BGR565 (5<<26)
> > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> > index 8afaad6..cb7ffd3 100644
> > --- a/drivers/gpu/drm/i915/intel_sprite.c
> > +++ b/drivers/gpu/drm/i915/intel_sprite.c
> > @@ -104,6 +104,12 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
> > break;
> > }
> >
> > + /*
> > + * Enable gamma to match primary/cursor plane behaviour.
> > + * FIXME should be user controllable via propertiesa.
> > + */
> > + sprctl |= SP_GAMMA_ENABLE;
> > +
> > if (obj->tiling_mode != I915_TILING_NONE)
> > sprctl |= SP_TILED;
> >
> > @@ -257,6 +263,12 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
> > BUG();
> > }
> >
> > + /*
> > + * Enable gamma to match primary/cursor plane behaviour.
> > + * FIXME should be user controllable via propertiesa.
> > + */
> > + sprctl |= SPRITE_GAMMA_ENABLE;
> > +
> > if (obj->tiling_mode != I915_TILING_NONE)
> > sprctl |= SPRITE_TILED;
> >
> > @@ -453,6 +465,12 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
> > BUG();
> > }
> >
> > + /*
> > + * Enable gamma to match primary/cursor plane behaviour.
> > + * FIXME should be user controllable via propertiesa.
> > + */
> > + dvscntr |= DVS_GAMMA_ENABLE;
> > +
> > if (obj->tiling_mode != I915_TILING_NONE)
> > dvscntr |= DVS_TILED;
> >
> > --
> > 1.8.3.1
> >
>
>
>
> --
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2013-11-21 8:10 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-19 2:32 [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
2013-11-19 2:32 ` [PATCH 1/9] drm/i915: Asynchronously perform the set-base for a simple modeset Rodrigo Vivi
2013-11-19 2:32 ` [PATCH 2/9] drm/i915: Fix gen3/4 vblank counter wraparound Rodrigo Vivi
2013-11-19 13:51 ` Chris Wilson
2013-11-19 2:32 ` [PATCH 3/9] drm/i915: Use frame counter for intel_wait_for_vblank() on CTG Rodrigo Vivi
2013-11-19 13:46 ` Chris Wilson
2013-11-19 16:38 ` Daniel Vetter
2013-11-19 17:26 ` Rodrigo Vivi
2013-11-19 2:32 ` [PATCH 4/9] drm/i915: Do hw quiescing first during unload Rodrigo Vivi
2013-11-19 17:43 ` Rodrigo Vivi
2013-11-19 2:32 ` [PATCH 5/9] drm/i915: print object bindings in debugfs Rodrigo Vivi
2013-11-19 13:52 ` Chris Wilson
2013-11-19 17:37 ` Rodrigo Vivi
2013-11-20 11:03 ` Chris Wilson
2013-11-20 16:52 ` Rodrigo Vivi
2013-11-19 2:32 ` [PATCH 6/9] drm/i915/vlv: enable HDMI audio for Valleyview2 Rodrigo Vivi
2013-11-19 2:32 ` [PATCH 7/9] drm/i915: Hold pc8 lock around toggling pc8.gpu_idle Rodrigo Vivi
2013-11-19 2:32 ` [PATCH 8/9] drm/i915: Do not enable package C8 on unsupported hardware Rodrigo Vivi
2013-11-19 12:02 ` Daniel Vetter
2013-11-19 2:32 ` [PATCH 9/9] drm/i915: Enable pipe gamma for sprites Rodrigo Vivi
2013-11-19 17:42 ` Rodrigo Vivi
2013-11-21 8:10 ` Daniel Vetter [this message]
2013-11-19 2:35 ` [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
2013-11-19 3:28 ` Ausmus, James
2013-11-19 17:25 ` Rodrigo Vivi
2013-11-19 17:44 ` Rodrigo Vivi
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