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From: Daniel Vetter <daniel@ffwll.ch>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 9/9] drm/i915: Flush caches for scanout during cpu->gtt move
Date: Mon, 25 Nov 2013 16:12:13 +0100	[thread overview]
Message-ID: <20131125151213.GZ27344@phenom.ffwll.local> (raw)
In-Reply-To: <20131125144022.GQ10036@intel.com>

On Mon, Nov 25, 2013 at 04:40:22PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 25, 2013 at 11:04:48AM +0000, Chris Wilson wrote:
> > On Mon, Nov 25, 2013 at 09:47:28AM +0100, Daniel Vetter wrote:
> > > On Thu, Nov 21, 2013 at 11:20:58PM +0000, Chris Wilson wrote:
> > > > On Thu, Nov 21, 2013 at 09:29:53PM +0200, ville.syrjala@linux.intel.com wrote:
> > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > 
> > > > > Flush the caches when moving a scanout buffer from CPU to GTT domain.
> > > > > This allows us to move a scanout buffer to CPU write domain, do some
> > > > > writes, and move it back to the GTT read domain. The display will then
> > > > > see the correct data. In addition we still need to do the dirtyfb
> > > > > ioctl to nuke FBC if that's enabled.
> > > > > 
> > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > 
> > > Isn't this what sw_finish is for?
> > 
> > I was more concerned about making sure the code was reasonably
> > self-consistent in applying our own coherency rules. As you point out,
> > it may be userspace making a mistake, but so many paths can end up here,
> > and almost never have pin_display, that it would seem to be preferrable
> > to do the extra flush rather than have the discrepancy.
> 
> If we don't do the flush in CPU->GTT move, we might miss it completely.
> Eg. if we do things in this order:
> 
> set_domain(CPU,CPU)
> write some data
> set_domain(GTT,0)

The question is: Who's doing the set_domain? Atm the sw_finish is done as
part of the libdrm unmap interface, so if userspace is wreaking havoc by
interleaving a set_domain here then that's Just a Bug.

If otoh the kernel is doing a set_domain then that means userspace is
racing access with some other thread concurrently and again gets to keep
both pieces.

We obviously need to keep things working, but beding over backwards to
make even insane cases work is imo not a good approach: The resulting
overkill tends to duct-tape over real issues which then hurt us
long-term. I much prefer a simple model for all the bo access paths we
have (and want to support) and shrug all the insane cases off with a
"you're doing it wrong".

Cheers, Daniel

> sw_finish()
> 
> sw_finish would not do the flush since the object is no longer in the
> CPU write domain.
> 
> -- 
> Ville Syrjälä
> Intel OTC

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2013-11-25 15:11 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-21 19:29 [PATCH 0/9] drm/i915: Some more FBC stuff ville.syrjala
2013-11-21 19:29 ` [PATCH 1/9] drm/i915: Don't set the fence number in DPFC_CTL on SNB ville.syrjala
2013-11-21 23:22   ` Chris Wilson
2013-11-25  8:43     ` Daniel Vetter
2013-11-21 19:29 ` [PATCH 2/9] drm/i915: Don't set persistent FBC mode on ILK/SNB ville.syrjala
2013-11-21 19:29 ` [PATCH 3/9] drm/i915: Don't set DPFC_HT_MODIFY bit on CTG/ILK/SNB ville.syrjala
2013-11-21 19:29 ` [PATCH 4/9] drm/i915: Use LRI based FBC render tracking for ILK ville.syrjala
2013-11-27 15:24   ` [PATCH v2 " ville.syrjala
2013-11-28 11:29     ` Chris Wilson
2013-11-21 19:29 ` [PATCH 5/9] drm/i915: Reorder i915_gem_execbuffer_move_to_gpu() and i915_switch_context() ville.syrjala
2013-11-21 19:29 ` [PATCH 6/9] drm/i915: Improve page flip vs. FBC interaction ville.syrjala
2013-11-21 19:29 ` [PATCH 7/9] drm: Push dirtyfb ioctl kms locking down to drivers ville.syrjala
2013-12-03 21:38   ` Daniel Vetter
2013-11-21 19:29 ` [PATCH 8/9] drm/i915: Hook up dirtyfb ioctl for FBC nuke ville.syrjala
2013-11-21 23:18   ` Chris Wilson
2013-11-22 15:19     ` Ville Syrjälä
2013-11-25  8:46       ` Daniel Vetter
2013-11-25 14:54     ` [PATCH v2 8/9] drm/i915: Nuke FBC from SW_FINISH ioctl ville.syrjala
2013-11-25 15:04       ` Chris Wilson
2013-11-25 15:19         ` [PATCH v3 " ville.syrjala
2013-12-04 16:28           ` [PATCH v4 " ville.syrjala
2013-11-21 19:29 ` [PATCH 9/9] drm/i915: Flush caches for scanout during cpu->gtt move ville.syrjala
2013-11-21 23:20   ` Chris Wilson
2013-11-25  8:47     ` Daniel Vetter
2013-11-25 11:04       ` Chris Wilson
2013-11-25 14:40         ` Ville Syrjälä
2013-11-25 15:12           ` Daniel Vetter [this message]
2013-12-03 21:42 ` [PATCH 0/9] drm/i915: Some more FBC stuff Daniel Vetter

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