From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/7] drm/i915: Shuffle sprite register writes into a tighter group
Date: Thu, 12 Dec 2013 13:00:03 -0800 [thread overview]
Message-ID: <20131212130003.2fe751f3@jbarnes-desktop> (raw)
In-Reply-To: <1382039599-31605-5-git-send-email-ville.syrjala@linux.intel.com>
On Thu, 17 Oct 2013 22:53:16 +0300
ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Group the sprite register writes a bit tighter. We want to write
> the registers atomically, and so doing the base address/offset
> artihmetic within the critical section is pointless when it can
> all be done beforehand.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_sprite.c | 18 +++++++++---------
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 0aa5911..c160e4f 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -118,9 +118,6 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
> crtc_w--;
> crtc_h--;
>
> - I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]);
> - I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x);
> -
> linear_offset = y * fb->pitches[0] + x * pixel_size;
> sprsurf_offset = intel_gen4_compute_page_offset(&x, &y,
> obj->tiling_mode,
> @@ -128,6 +125,9 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
> fb->pitches[0]);
> linear_offset -= sprsurf_offset;
>
> + I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]);
> + I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x);
> +
> if (obj->tiling_mode != I915_TILING_NONE)
> I915_WRITE(SPTILEOFF(pipe, plane), (y << 16) | x);
> else
> @@ -295,15 +295,15 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
> } else
> dev_priv->sprite_scaling_enabled &= ~(1 << pipe);
>
> - I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]);
> - I915_WRITE(SPRPOS(pipe), (crtc_y << 16) | crtc_x);
> -
> linear_offset = y * fb->pitches[0] + x * pixel_size;
> sprsurf_offset =
> intel_gen4_compute_page_offset(&x, &y, obj->tiling_mode,
> pixel_size, fb->pitches[0]);
> linear_offset -= sprsurf_offset;
>
> + I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]);
> + I915_WRITE(SPRPOS(pipe), (crtc_y << 16) | crtc_x);
> +
> /* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET
> * register */
> if (IS_HASWELL(dev))
> @@ -473,15 +473,15 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
> if (crtc_w != src_w || crtc_h != src_h)
> dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h;
>
> - I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]);
> - I915_WRITE(DVSPOS(pipe), (crtc_y << 16) | crtc_x);
> -
> linear_offset = y * fb->pitches[0] + x * pixel_size;
> dvssurf_offset =
> intel_gen4_compute_page_offset(&x, &y, obj->tiling_mode,
> pixel_size, fb->pitches[0]);
> linear_offset -= dvssurf_offset;
>
> + I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]);
> + I915_WRITE(DVSPOS(pipe), (crtc_y << 16) | crtc_x);
> +
> if (obj->tiling_mode != I915_TILING_NONE)
> I915_WRITE(DVSTILEOFF(pipe), (y << 16) | x);
> else
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
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Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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next prev parent reply other threads:[~2013-12-12 20:58 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-17 19:53 [PATCH 0/7] drm/i915: Atomic sprites ville.syrjala
2013-10-17 19:53 ` [PATCH 1/7] drm/i915: Don't disable primary when color keying is used ville.syrjala
2013-12-12 20:56 ` Jesse Barnes
2013-12-12 20:58 ` Daniel Vetter
2013-12-13 8:41 ` Ville Syrjälä
2013-10-17 19:53 ` [PATCH 2/7] drm/i915: Fix non-scaled sprites for ILK ville.syrjala
2013-10-17 20:56 ` Chris Wilson
2013-10-18 7:35 ` Ville Syrjälä
2013-10-17 19:53 ` [PATCH 3/7] drm/i915: Add i915_get_crtc_scanline() ville.syrjala
2013-12-12 20:59 ` Jesse Barnes
2013-10-17 19:53 ` [PATCH 4/7] drm/i915: Shuffle sprite register writes into a tighter group ville.syrjala
2013-12-12 21:00 ` Jesse Barnes [this message]
2013-10-17 19:53 ` [PATCH 5/7] drm/i915: Make sprite updates atomic ville.syrjala
2013-12-12 21:04 ` Jesse Barnes
2013-12-12 21:09 ` Jesse Barnes
2013-10-17 19:53 ` [PATCH 6/7] drm/i915: Perform primary enable/disable atomically with sprite updates ville.syrjala
2013-12-12 21:06 ` Jesse Barnes
2013-10-17 19:53 ` [PATCH 7/7] drm/i915: Add pipe update trace points ville.syrjala
2013-12-12 21:08 ` Jesse Barnes
2013-12-13 8:47 ` Ville Syrjälä
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