From: Daniel Vetter <daniel@ffwll.ch>
To: Ben Widawsky <ben@bwidawsk.net>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915: Always set fifo count to zero in gen6_reset
Date: Wed, 5 Mar 2014 20:33:59 +0100 [thread overview]
Message-ID: <20140305193359.GA17001@phenom.ffwll.local> (raw)
In-Reply-To: <20140305181254.GD19373@bwidawsk.net>
On Wed, Mar 05, 2014 at 10:12:55AM -0800, Ben Widawsky wrote:
> On Wed, Mar 05, 2014 at 06:08:19PM +0200, Mika Kuoppala wrote:
> > There should not be a case where fifo count is other
> > than zero after a successful reset. Always set
> > count to zero, but be paranoid enough to warn.
> >
> > v2: rebased
> >
> > Suggested-by: Ben Widawsky <ben@bwidawsk.net>
> > Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_uncore.c | 7 ++++---
> > 1 file changed, 4 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> > index 00320fd..79eaba8 100644
> > --- a/drivers/gpu/drm/i915/intel_uncore.c
> > +++ b/drivers/gpu/drm/i915/intel_uncore.c
> > @@ -988,9 +988,10 @@ static int gen6_do_reset(struct drm_device *dev)
> > dev_priv->uncore.funcs.force_wake_get(dev_priv, fw_engine);
> >
> > if (IS_GEN6(dev) || IS_GEN7(dev))
> > - dev_priv->uncore.fifo_count =
> > - __raw_i915_read32(dev_priv, GTFIFOCTL) &
> > - GT_FIFO_FREE_ENTRIES_MASK;
> > + WARN_ON((__raw_i915_read32(dev_priv, GTFIFOCTL) &
> > + GT_FIFO_FREE_ENTRIES_MASK) != 0);
> > +
> > + dev_priv->uncore.fifo_count = 0;
> >
> > spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> > return ret;
>
> Can you please add the following to the commit message:
> "The GT FIFO is bypassed when not in RC6 from both IA and SA. As we've
> just reset the GPU and not yet enabled RC6, there is no way the FIFO can
> be anything but 0. If it is non-zero, it's a HW bug, and we can try to
> carry on by faking it. It should be noted that RC6 is highly unlikely to
> work properly if this WARN fires, however the system should continue on
> just fine."
Done.
>
> With that:
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2014-03-05 19:34 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-05 16:08 [PATCH 1/2] drm/i915: No need to put forcewake after a reset Mika Kuoppala
2014-03-05 16:08 ` [PATCH 2/2] drm/i915: Always set fifo count to zero in gen6_reset Mika Kuoppala
2014-03-05 18:12 ` Ben Widawsky
2014-03-05 19:33 ` Daniel Vetter [this message]
2014-03-05 17:59 ` [PATCH 1/2] drm/i915: No need to put forcewake after a reset Ben Widawsky
2014-03-05 18:12 ` Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20140305193359.GA17001@phenom.ffwll.local \
--to=daniel@ffwll.ch \
--cc=ben@bwidawsk.net \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox