From: Daniel Vetter <daniel@ffwll.ch>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/i915: make sure PC8 is enabled on suspend and disabled on resume v4
Date: Thu, 12 Jun 2014 17:56:45 +0200 [thread overview]
Message-ID: <20140612155645.GZ5821@phenom.ffwll.local> (raw)
In-Reply-To: <1402587348-2808-5-git-send-email-jbarnes@virtuousgeek.org>
On Thu, Jun 12, 2014 at 08:35:48AM -0700, Jesse Barnes wrote:
> From: Kristen Carlson Accardi <kristen@linux.intel.com>
>
> This matches the runtime suspend paths and allows the system to enter
> the lowest power mode at freeze time.
>
> v2: move disable_pc8 call to thaw_early (Imre)
> move enable_pc8 to freeze_late (Imre/Jesse)
> v3: drop spurious hunk from _freeze now that we have freeze_late (Jesse)
> v4: move back to suspend_late (Imre was right)
>
> Reviewed-by: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Kristen Carlson Accardi <kristen@linux.intel.com>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index e54dc6c..4823435 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -610,6 +610,9 @@ static int i915_drm_thaw_early(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
>
> + if (IS_HASWELL(dev) || IS_BROADWELL(dev))
> + hsw_disable_pc8(dev_priv);
Not terribly happy really about this one here, since it leaks platform
logic into the generic codepaths. Sooner or later we'll add the same for
byt/chv and then it'll slowly diverge ...
Queued for now (since runtime pm is suffering from too much platform
specifics a bit in general), but grumpily.
-Daniel
> +
> intel_uncore_early_sanitize(dev);
> intel_uncore_sanitize(dev);
> intel_power_domains_init_hw(dev_priv);
> @@ -893,6 +896,7 @@ static int i915_pm_suspend_late(struct device *dev)
> {
> struct pci_dev *pdev = to_pci_dev(dev);
> struct drm_device *drm_dev = pci_get_drvdata(pdev);
> + struct drm_i915_private *dev_priv = drm_dev->dev_private;
>
> /*
> * We have a suspedn ordering issue with the snd-hda driver also
> @@ -906,6 +910,9 @@ static int i915_pm_suspend_late(struct device *dev)
> if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
> return 0;
>
> + if (IS_HASWELL(drm_dev) || IS_BROADWELL(drm_dev))
> + hsw_enable_pc8(dev_priv);
> +
> pci_disable_device(pdev);
> pci_set_power_state(pdev, PCI_D3hot);
>
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
prev parent reply other threads:[~2014-06-12 15:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-12 15:35 [PATCH 1/5] drm/i915: disable power wells on suspend Jesse Barnes
2014-06-12 15:35 ` [PATCH 2/5] drm/i915: leave rc6 enabled at suspend time v4 Jesse Barnes
2014-06-12 15:53 ` [PATCH] drm/i915: Unifiy GT powersave suspend logic Daniel Vetter
2014-06-12 16:16 ` Jesse Barnes
2014-06-12 15:35 ` [PATCH 3/5] ACPI: export target system state for use by drivers Jesse Barnes
2014-06-12 15:35 ` [PATCH 4/5] drm/i915: send proper opregion notifications on suspend/resume Jesse Barnes
2014-06-12 15:35 ` [PATCH 5/5] drm/i915: make sure PC8 is enabled on suspend and disabled on resume v4 Jesse Barnes
2014-06-12 15:56 ` Daniel Vetter [this message]
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