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From: Ben Widawsky <benjamin.widawsky@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Ben Widawsky <ben@bwidawsk.net>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 09/10] drm/i915/bdw: Always issue a force restore
Date: Thu, 3 Jul 2014 14:38:21 -0700	[thread overview]
Message-ID: <20140703213820.GA17054@intel.com> (raw)
In-Reply-To: <1404423186-2019-10-git-send-email-rodrigo.vivi@intel.com>

On Thu, Jul 03, 2014 at 05:33:05PM -0400, Rodrigo Vivi wrote:
> From: Ben Widawsky <benjamin.widawsky@intel.com>
> 
> The PDPs seem to get screwed up otherwise, specifically PDP0. I am not
> really clear why this is required, it just works with full PPGTT.
> 
> v2: Only do it for gen8, to limit regression potential
> 
> v3: Fix the bugzilla links
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78891
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78935
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78936
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78937
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78938
> 
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_context.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 633e318..61b60b6 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -573,6 +573,9 @@ mi_set_context(struct intel_engine_cs *ring,
>  	else
>  		intel_ring_emit(ring, MI_NOOP);
>  
> +	if (INTEL_INFO(ring->dev)->gen == 8)
> +		hw_flags |= MI_FORCE_RESTORE;
> +
>  	intel_ring_emit(ring, MI_NOOP);
>  	intel_ring_emit(ring, MI_SET_CONTEXT);
>  	intel_ring_emit(ring,

Ville had a good point on this patch wrt to note setting both
MI_FORCE_RESTORE, and MI_RESTORE_INHIBIT (though it seems to cause no
problems).

I think also with some of the do_switch() cleanups recently submitted,
this one may no longer be necessary - not sure.

-- 
Ben Widawsky, Intel Open Source Technology Center

  reply	other threads:[~2014-07-03 21:38 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-03 21:32 [PATCH 00/10] drm-intel-collector - update Rodrigo Vivi
2014-07-03 21:32 ` [PATCH 01/10] drm/i915: Bring UP Power Wells before disabling RC6 Rodrigo Vivi
2014-07-03 21:32 ` [PATCH 02/10] drm/i915: Don't save/restore RS when not used Rodrigo Vivi
2014-07-03 21:32 ` [PATCH 03/10] drm/i915: Upgrade execbuffer fail after resume failure to EIO Rodrigo Vivi
2014-07-03 21:33 ` [PATCH 04/10] drm/i915: Add property to set HDMI aspect ratio Rodrigo Vivi
2014-07-03 21:33 ` [PATCH 05/10] drm/i915/vlv: WA for Turbo and RC6 to work together Rodrigo Vivi
2014-07-08 19:05   ` Daniel Vetter
2014-07-03 21:33 ` [PATCH 06/10] drm/i915: honour forced connector modes Rodrigo Vivi
2014-07-03 21:33 ` [PATCH 07/10] drm/i915: HWS must be in the mappable region for g33 Rodrigo Vivi
2014-07-08 19:07   ` Daniel Vetter
2014-07-03 21:33 ` [PATCH 08/10] drm/i915: Don't promote UC to WT automagically Rodrigo Vivi
2014-07-03 21:33 ` [PATCH 09/10] drm/i915/bdw: Always issue a force restore Rodrigo Vivi
2014-07-03 21:38   ` Ben Widawsky [this message]
2014-07-03 21:39     ` Rodrigo Vivi
2014-07-03 21:33 ` [PATCH 10/10] drm/i915/vlv: T12 eDP panel timing enforcement during reboot Rodrigo Vivi
2014-07-08 19:09 ` [PATCH 00/10] drm-intel-collector - update Daniel Vetter

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