From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915: WARN if interrupts aren't on in en/disable_pipestat
Date: Thu, 4 Sep 2014 10:36:20 -0700 [thread overview]
Message-ID: <20140904103620.10bda43c@jbarnes-desktop> (raw)
In-Reply-To: <CAKMK7uExphjZU0o6H=wvQ+7rofBcXUZqfSAJany7Kx960uJ4sA@mail.gmail.com>
On Thu, 4 Sep 2014 18:59:55 +0200
Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> On Thu, Sep 4, 2014 at 6:24 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > On Thu, 4 Sep 2014 17:59:18 +0200
> > Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> >
> >> On Thu, Aug 28, 2014 at 1:00 AM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> >> >> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> >> >> index 9eb303c1b621..76bc4d0de5a4 100644
> >> >> --- a/drivers/gpu/drm/i915/i915_irq.c
> >> >> +++ b/drivers/gpu/drm/i915/i915_irq.c
> >> >> @@ -589,6 +589,7 @@ __i915_enable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
> >> >> u32 pipestat = I915_READ(reg) & PIPESTAT_INT_ENABLE_MASK;
> >> >>
> >> >> assert_spin_locked(&dev_priv->irq_lock);
> >> >> + WARN_ON(!intel_irqs_enabled(dev_priv));
> >> >>
> >> >> if (WARN_ONCE(enable_mask & ~PIPESTAT_INT_ENABLE_MASK ||
> >> >> status_mask & ~PIPESTAT_INT_STATUS_MASK,
> >> >> @@ -615,6 +616,7 @@ __i915_disable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
> >> >> u32 pipestat = I915_READ(reg) & PIPESTAT_INT_ENABLE_MASK;
> >> >>
> >> >> assert_spin_locked(&dev_priv->irq_lock);
> >> >> + WARN_ON(!intel_irqs_enabled(dev_priv));
> >> >>
> >> >> if (WARN_ONCE(enable_mask & ~PIPESTAT_INT_ENABLE_MASK ||
> >> >> status_mask & ~PIPESTAT_INT_STATUS_MASK,
> >> >
> >> > Yeah looks good, wonder if it'll trigger any new warnings.
> >>
> >> It will blow up in a bunch of postinstall hooks, just like the one for
> >> ilk. At least without my patch to shuffle the pm._irqs_disabled
> >> assignment around.
> >>
> >> > Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> >>
> >> ... so does that count as an implicit r-b on my other patch?
> >
> > Sure, though didn't Jani find some issues with it?
>
> QA claims that both my and your patch break the display on hsw, bdw
> and snb or something like that. Which either means I'm blind (since
> either patch should only affect ilk in a functional way) or they're
> doing something really strange. I have no idea what's actually going
> on there, but we have a regular stream of reports of this one here ...
Yeah I agree the results are weird; don't see how we'd affect BDW
display, esp with my patch, so I'd say go ahead with either. Though if
you do mine I guess you'd drop the above.
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2014-09-04 17:36 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-27 8:43 [PATCH] drm/i915: WARN if interrupts aren't on in en/disable_pipestat Daniel Vetter
2014-08-27 8:51 ` Chris Wilson
2014-08-27 10:23 ` Daniel Vetter
2014-08-27 11:28 ` Chris Wilson
2014-08-27 13:29 ` Daniel Vetter
2014-08-27 23:00 ` Jesse Barnes
2014-09-04 15:59 ` Daniel Vetter
2014-09-04 16:24 ` Jesse Barnes
2014-09-04 16:59 ` Daniel Vetter
2014-09-04 17:36 ` Jesse Barnes [this message]
2014-09-08 8:18 ` Daniel Vetter
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