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From: Daniel Vetter <daniel@ffwll.ch>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Ignore DRM_MODE_FLAG_DBLCLK flag with DP
Date: Mon, 2 Feb 2015 18:21:31 +0100	[thread overview]
Message-ID: <20150202172131.GB14009@phenom.ffwll.local> (raw)
In-Reply-To: <1422897393-15869-1-git-send-email-ville.syrjala@linux.intel.com>

On Mon, Feb 02, 2015 at 07:16:33PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The DP spec has nothing at all to say about double clocked modes. One
> might assume they don't exist, and if you think about the concept
> doesn't make much sense since the link already runs at higher fixed
> frequency. So let's drop the DRM_MODE_FLAG_DBLCLK checks and simply
> use the mode as if it was not double clocked.
> 
> I've tested this on a Dell UP2414Q which claims to support 720x576i
> and 720x480i double clocked CEA modes, and it seems perfectly happy
> with both modes using the 1x clock.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

What happens when this is for a dp->vga sst dongle? Or an active dvi/hdmi
dongle (not sure those exist ...), are we sure this wont upset an existing
screen somewhere?
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_dp.c | 6 ------
>  1 file changed, 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index eea9e36..4b0dadb 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -222,9 +222,6 @@ intel_dp_mode_valid(struct drm_connector *connector,
>  	if (mode->clock < 10000)
>  		return MODE_CLOCK_LOW;
>  
> -	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> -		return MODE_H_ILLEGAL;
> -
>  	return MODE_OK;
>  }
>  
> @@ -1189,9 +1186,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  						intel_connector->panel.fitting_mode);
>  	}
>  
> -	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
> -		return false;
> -
>  	DRM_DEBUG_KMS("DP link computation with max lane count %i "
>  		      "max bw %02x pixel clock %iKHz\n",
>  		      max_lane_count, bws[max_clock],
> -- 
> 2.0.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-02-02 17:20 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-02 17:16 [PATCH] drm/i915: Ignore DRM_MODE_FLAG_DBLCLK flag with DP ville.syrjala
2015-02-02 17:21 ` Daniel Vetter [this message]
2015-02-02 17:40   ` Ville Syrjälä
2015-02-03  4:40 ` shuang.he

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