From: Daniel Vetter <daniel@ffwll.ch>
To: Damien Lespiau <damien.lespiau@intel.com>
Cc: intel-gfx@lists.freedesktop.org, rodrigo.vivi@intel.com
Subject: Re: [PATCH] drm/i915: Be optimistic about future display engines having 7 WM levels
Date: Mon, 11 May 2015 12:20:28 +0200 [thread overview]
Message-ID: <20150511102028.GV15256@phenom.ffwll.local> (raw)
In-Reply-To: <1431133555-32179-1-git-send-email-damien.lespiau@intel.com>
On Sat, May 09, 2015 at 02:05:55AM +0100, Damien Lespiau wrote:
> As we're doing throughout the code, being optimistic that platform n + 1
> will mostly reuse the same things as platform n allows us to minimize
> the enabling work needed.
>
> This time, it's about the number of WM levels.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 7006f94..3271e4a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1946,7 +1946,7 @@ static void intel_fixup_cur_wm_latency(struct drm_device *dev, uint16_t wm[5])
> int ilk_wm_max_level(const struct drm_device *dev)
> {
> /* how many WM levels are we expecting */
> - if (IS_GEN9(dev))
> + if (INTEL_INFO(dev)->gen >= 9)
> return 7;
> else if (IS_HASWELL(dev) || IS_BROADWELL(dev))
> return 4;
> --
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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prev parent reply other threads:[~2015-05-11 10:18 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-09 1:05 [PATCH] drm/i915: Be optimistic about future display engines having 7 WM levels Damien Lespiau
2015-05-09 17:16 ` shuang.he
2015-05-11 10:20 ` Daniel Vetter [this message]
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