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From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Report IOMMU enabled status for GPU hangs
Date: Wed, 12 Aug 2015 14:49:02 +0200	[thread overview]
Message-ID: <20150812124902.GJ17734@phenom.ffwll.local> (raw)
In-Reply-To: <1438975455-29442-1-git-send-email-chris@chris-wilson.co.uk>

On Fri, Aug 07, 2015 at 08:24:15PM +0100, Chris Wilson wrote:
> The IOMMU for Intel graphics has historically had many issues resulting
> in random GPU hangs. Lets include its status when capturing the GPU hang
> error state for post-mortem analysis.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Queued for -next, thanks for the patch.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_drv.h       | 1 +
>  drivers/gpu/drm/i915/i915_gpu_error.c | 5 +++++
>  2 files changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 786ddd8b4e97..82d225786db2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -488,6 +488,7 @@ struct drm_i915_error_state {
>  	struct timeval time;
>  
>  	char error_msg[128];
> +	int iommu;
>  	u32 reset_count;
>  	u32 suspend_count;
>  
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 0110c2626859..21ae99e5b1ed 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -399,6 +399,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
>  	err_printf(m, "Reset count: %u\n", error->reset_count);
>  	err_printf(m, "Suspend count: %u\n", error->suspend_count);
>  	err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
> +	err_printf(m, "IOMMU enabled?: %d\n", error->iommu);
>  	err_printf(m, "EIR: 0x%08x\n", error->eir);
>  	err_printf(m, "IER: 0x%08x\n", error->ier);
>  	if (INTEL_INFO(dev)->gen >= 8) {
> @@ -1341,6 +1342,10 @@ static void i915_error_capture_msg(struct drm_device *dev,
>  static void i915_capture_gen_state(struct drm_i915_private *dev_priv,
>  				   struct drm_i915_error_state *error)
>  {
> +	error->iommu = -1;
> +#ifdef CONFIG_INTEL_IOMMU
> +	error->iommu = intel_iommu_gfx_mapped;
> +#endif
>  	error->reset_count = i915_reset_count(&dev_priv->gpu_error);
>  	error->suspend_count = dev_priv->suspend_count;
>  }
> -- 
> 2.5.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

      reply	other threads:[~2015-08-12 12:49 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-07 19:24 [PATCH] drm/i915: Report IOMMU enabled status for GPU hangs Chris Wilson
2015-08-12 12:49 ` Daniel Vetter [this message]

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