From: Daniel Vetter <daniel@ffwll.ch>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 14/14] drm/i915: Dump pfit state as hex
Date: Fri, 4 Sep 2015 10:34:22 +0200 [thread overview]
Message-ID: <20150904083422.GQ22430@phenom.ffwll.local> (raw)
In-Reply-To: <1441306216-6581-15-git-send-email-ville.syrjala@linux.intel.com>
On Thu, Sep 03, 2015 at 09:50:16PM +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The pfit state is stored as register values, so dump them as hex instead
> of decimal to make some sense of the error messages.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Picked just this one because I liked it. No clue about dsi details but the
new state handling for dsi makes me happy \o/
Cheers, Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 2776974..4aab8f4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12442,16 +12442,16 @@ intel_pipe_config_compare(struct drm_device *dev,
> PIPE_CONF_CHECK_I(pipe_src_w);
> PIPE_CONF_CHECK_I(pipe_src_h);
>
> - PIPE_CONF_CHECK_I(gmch_pfit.control);
> + PIPE_CONF_CHECK_X(gmch_pfit.control);
> /* pfit ratios are autocomputed by the hw on gen4+ */
> if (INTEL_INFO(dev)->gen < 4)
> PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
> - PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
> + PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits);
>
> PIPE_CONF_CHECK_I(pch_pfit.enabled);
> if (current_config->pch_pfit.enabled) {
> - PIPE_CONF_CHECK_I(pch_pfit.pos);
> - PIPE_CONF_CHECK_I(pch_pfit.size);
> + PIPE_CONF_CHECK_X(pch_pfit.pos);
> + PIPE_CONF_CHECK_X(pch_pfit.size);
> }
>
> PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> --
> 2.4.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Intel-gfx mailing list
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prev parent reply other threads:[~2015-09-04 8:31 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-03 18:50 [PATCH 00/14] drm/i915: VLV/CHV DPLL and DSI stuff ville.syrjala
2015-09-03 18:50 ` [PATCH v2 01/14] drm/i915: Make {vlv, chv}_{disable, update}_pll() more similar ville.syrjala
2015-09-03 18:50 ` [PATCH 02/14] drm/i915: Implement WaPixelRepeatModeFixForC0:chv ville.syrjala
2015-09-03 18:50 ` [PATCH 03/14] drm/i915: Power down the DSI PLL before reconfiguring it ville.syrjala
2015-09-03 18:50 ` [PATCH 04/14] drm/i915: Add a local pipe variable to vlv_enable_pll() ville.syrjala
2015-09-03 18:50 ` [PATCH 05/14] drm/i915: assert_panel_unlocked() in chv_enable_pll() ville.syrjala
2015-09-03 18:50 ` [PATCH 06/14] drm/i915: Remove the "three times for luck" trick from vlv_enable_pll() ville.syrjala
2015-09-03 18:50 ` [PATCH 07/14] drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV ville.syrjala
2015-09-03 18:50 ` [PATCH 08/14] drm/i915: Compute DSI PLL parameters during .compute_config() ville.syrjala
2015-09-03 18:50 ` [PATCH 09/14] drm/i915: Fix CHV DSI PLL refclk during state readout ville.syrjala
2015-09-03 18:50 ` [PATCH 10/14] drm/i915: Change lfsr_converts[] to u16 ville.syrjala
2015-09-03 18:50 ` [PATCH 11/14] drm/i915: Throw out BUGs from DPLL/PCH functions ville.syrjala
2015-09-03 18:50 ` [PATCH 12/14] drm/i915: Hook up pfit for DSI ville.syrjala
2015-09-03 18:50 ` [PATCH 13/14] drm/i915: Reject 'Center' scaling mode for eDP/DSI on GMCH platforms ville.syrjala
2015-09-03 18:50 ` [PATCH 14/14] drm/i915: Dump pfit state as hex ville.syrjala
2015-09-04 8:34 ` Daniel Vetter [this message]
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