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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/8] drm/i915: Call g4x_find_best_dpll() directly from ILK+ code
Date: Fri, 11 Mar 2016 17:32:25 +0200	[thread overview]
Message-ID: <20160311153225.GG4329@intel.com> (raw)
In-Reply-To: <1457707955-23580-6-git-send-email-ander.conselvan.de.oliveira@intel.com>

On Fri, Mar 11, 2016 at 04:52:32PM +0200, Ander Conselvan de Oliveira wrote:
> The call to dev_priv->display.find_dpll() is already in platform
> specific code, so avoid the extra detour.
> 
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 02abeaa..c9d4511 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8763,9 +8763,8 @@ static bool ironlake_compute_clocks(struct drm_crtc *crtc,
>  	 * refclk, or FALSE.  The returned values represent the clock equation:
>  	 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
>  	 */
> -	ret = dev_priv->display.find_dpll(limit, crtc_state,
> -					  crtc_state->port_clock,
> -					  refclk, NULL, clock);
> +	ret = g4x_find_best_dpll(limit, crtc_state, crtc_state->port_clock,
> +				 refclk, NULL, clock);
>  	if (!ret)
>  		return false;
>  
> -- 
> 2.4.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-03-11 15:32 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-11 14:52 [PATCH 0/8] Clean up ironlake clock computation code Ander Conselvan de Oliveira
2016-03-11 14:52 ` [PATCH 1/8] drm/i915: Remove ironlake reduced clock computation Ander Conselvan de Oliveira
2016-03-11 14:52 ` [PATCH 2/8] drm/i915: Remove checks for clone config with LVDS in ILK+ dpll code Ander Conselvan de Oliveira
2016-03-11 14:52 ` [PATCH 3/8] drm/i915: Merge ironlake_get_refclk() into its only caller Ander Conselvan de Oliveira
2016-03-11 14:52 ` [PATCH 4/8] drm/i915: Fold intel_ironlake_limit() into clock computation function Ander Conselvan de Oliveira
2016-03-11 14:52 ` [PATCH 5/8] drm/i915: Call g4x_find_best_dpll() directly from ILK+ code Ander Conselvan de Oliveira
2016-03-11 15:32   ` Ville Syrjälä [this message]
2016-03-11 14:52 ` [PATCH 6/8] drm/i915: Don't calculate a new clock in ILK+ code if it is already set Ander Conselvan de Oliveira
2016-03-11 14:52 ` [PATCH 7/8] drm/i915: Remove PCH type checks from ironlake_crtc_compute_clock() Ander Conselvan de Oliveira
2016-03-11 14:52 ` [PATCH 8/8] drm/i915: Simplify ironlake_crtc_compute_clock() CPU eDP case Ander Conselvan de Oliveira
2016-03-11 15:27 ` [PATCH 0/8] Clean up ironlake clock computation code Ville Syrjälä
2016-03-11 16:29 ` ✗ Fi.CI.BAT: failure for " Patchwork

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