public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/4] drm/i915: reorganize the get_cdclk assignment
Date: Fri, 17 Feb 2017 16:05:35 +0200	[thread overview]
Message-ID: <20170217140535.GR31595@intel.com> (raw)
In-Reply-To: <1487337727-9813-5-git-send-email-paulo.r.zanoni@intel.com>

On Fri, Feb 17, 2017 at 11:22:07AM -0200, Paulo Zanoni wrote:
> Possible problems of the current if-ladder:
>   - It's a huge if ladder with almost a different check for each of
>     our platforms.
>   - It mixes 3 different types of checks: IS_GENX, IS_PLATFORM and
>     IS_GROUP_OF_PLATFORMS.
>   - As demonstrated by the recent IS_G4X commit, it's not easy to be
>     sure if a platform down on the list isn't also checked earlier.
>   - As demonstrated by the WARN at the end, it's not easy to be sure
>     if we're actually checking for every single platform.
> 
> Possible advantages of the new switch statement:
>   - It may be easier for the compiler to optimize stuff (I didn't
>     check this), especially since the values are labels of an enum.
>   - The compiler will tell us in case we miss some platform.
>   - All platforms are explicitly there instead of maybe hidden in some
>     check for a certain group of platforms such as IS_GEN9_BC.

Performance is a bit of a moot point since this is run exaclty once, but
the IS_GEN9_BC() stuff I tend to agree with. I don't really like those
macros at all since they don't actully mean anything as far as the
hardware features go.

> 
> Possible disadvantages with the new code:
>   - A few lines bigger.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_cdclk.c | 103 ++++++++++++++++++++++---------------
>  1 file changed, 62 insertions(+), 41 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
> index 7c92dc7..58a2f5c 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1789,49 +1789,70 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)
>  		dev_priv->display.modeset_calc_cdclk = skl_modeset_calc_cdclk;
>  	}
>  
> -	if (IS_GEN9_BC(dev_priv))
> -		dev_priv->display.get_cdclk = skl_get_cdclk;
> -	else if (IS_GEN9_LP(dev_priv))
> -		dev_priv->display.get_cdclk = bxt_get_cdclk;
> -	else if (IS_BROADWELL(dev_priv))
> -		dev_priv->display.get_cdclk = bdw_get_cdclk;
> -	else if (IS_HASWELL(dev_priv))
> -		dev_priv->display.get_cdclk = hsw_get_cdclk;
> -	else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> -		dev_priv->display.get_cdclk = vlv_get_cdclk;
> -	else if (IS_GEN6(dev_priv) || IS_IVYBRIDGE(dev_priv))
> +	switch (INTEL_INFO(dev_priv)->platform) {
> +	case INTEL_PLATFORM_UNINITIALIZED:

Just default: ?

> +		MISSING_CASE(INTEL_INFO(dev_priv)->platform);
> +		/* Fall through. */
> +	case INTEL_I830:
> +		dev_priv->display.get_cdclk = fixed_133mhz_get_cdclk;
> +		break;
> +	case INTEL_I845G:
> +		dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk;
> +		break;
> +	case INTEL_I85X:
> +		dev_priv->display.get_cdclk = i85x_get_cdclk;
> +		break;
> +	case INTEL_I865G:
> +		dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk;
> +		break;
> +	case INTEL_I915G:
> +		dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk;
> +		break;
> +	case INTEL_I915GM:
> +		dev_priv->display.get_cdclk = i915gm_get_cdclk;
> +		break;
> +	case INTEL_I945G:
> +	case INTEL_I965G:
> +	case INTEL_SANDYBRIDGE:
> +	case INTEL_IVYBRIDGE:

I don't particularly like this disorder. I just managed to get the
list into some sort of sane order recently.

>  		dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> -	else if (IS_GEN5(dev_priv))
> -		dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk;
> -	else if (IS_GM45(dev_priv))
> -		dev_priv->display.get_cdclk = gm45_get_cdclk;
> -	else if (IS_G45(dev_priv))
> +		break;
> +	case INTEL_I945GM:
> +		dev_priv->display.get_cdclk = i945gm_get_cdclk;
> +		break;
> +	case INTEL_G33:
> +	case INTEL_G45:

More disorder.

>  		dev_priv->display.get_cdclk = g33_get_cdclk;
> -	else if (IS_I965GM(dev_priv))
> -		dev_priv->display.get_cdclk = i965gm_get_cdclk;
> -	else if (IS_I965G(dev_priv))
> -		dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> -	else if (IS_PINEVIEW(dev_priv))
> +		break;
> +	case INTEL_PINEVIEW:
>  		dev_priv->display.get_cdclk = pnv_get_cdclk;
> -	else if (IS_G33(dev_priv))
> -		dev_priv->display.get_cdclk = g33_get_cdclk;
> -	else if (IS_I945GM(dev_priv))
> -		dev_priv->display.get_cdclk = i945gm_get_cdclk;
> -	else if (IS_I945G(dev_priv))
> -		dev_priv->display.get_cdclk = fixed_400mhz_get_cdclk;
> -	else if (IS_I915GM(dev_priv))
> -		dev_priv->display.get_cdclk = i915gm_get_cdclk;
> -	else if (IS_I915G(dev_priv))
> -		dev_priv->display.get_cdclk = fixed_333mhz_get_cdclk;
> -	else if (IS_I865G(dev_priv))
> -		dev_priv->display.get_cdclk = fixed_266mhz_get_cdclk;
> -	else if (IS_I85X(dev_priv))
> -		dev_priv->display.get_cdclk = i85x_get_cdclk;
> -	else if (IS_I845G(dev_priv))
> -		dev_priv->display.get_cdclk = fixed_200mhz_get_cdclk;
> -	else { /* 830 */
> -		WARN(!IS_I830(dev_priv),
> -		     "Unknown platform. Assuming 133 MHz CDCLK\n");
> -		dev_priv->display.get_cdclk = fixed_133mhz_get_cdclk;
> +		break;
> +	case INTEL_I965GM:
> +		dev_priv->display.get_cdclk = i965gm_get_cdclk;
> +		break;
> +	case INTEL_GM45:
> +		dev_priv->display.get_cdclk = gm45_get_cdclk;
> +		break;
> +	case INTEL_IRONLAKE:
> +		dev_priv->display.get_cdclk = fixed_450mhz_get_cdclk;
> +		break;
> +	case INTEL_VALLEYVIEW:
> +	case INTEL_CHERRYVIEW:
> +		dev_priv->display.get_cdclk = vlv_get_cdclk;
> +		break;
> +	case INTEL_HASWELL:
> +		dev_priv->display.get_cdclk = hsw_get_cdclk;
> +		break;
> +	case INTEL_BROADWELL:
> +		dev_priv->display.get_cdclk = bdw_get_cdclk;
> +		break;
> +	case INTEL_SKYLAKE:
> +	case INTEL_KABYLAKE:
> +		dev_priv->display.get_cdclk = skl_get_cdclk;
> +		break;
> +	case INTEL_BROXTON:
> +	case INTEL_GEMINILAKE:
> +		dev_priv->display.get_cdclk = bxt_get_cdclk;
> +		break;
>  	}
>  }
> -- 
> 2.7.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-02-17 14:05 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-17 13:22 [PATCH 0/4] Small clocking code refactor Paulo Zanoni
2017-02-17 13:22 ` [PATCH 1/4] drm/i915: kill {bdw, bxt}_modeset_calc_cdclk Paulo Zanoni
2017-02-17 13:51   ` Ville Syrjälä
2017-02-18 15:13   ` David Weinehall
2017-02-17 13:22 ` [PATCH 2/4] drm/i915: add intel_calc_cdclk() Paulo Zanoni
2017-02-17 13:49   ` Ville Syrjälä
2017-02-17 20:37     ` Paulo Zanoni
2017-02-17 20:48       ` Ville Syrjälä
2017-02-17 13:22 ` [PATCH 3/4] drm/i915: remove potentially confusing IS_G4X checks Paulo Zanoni
2017-02-17 13:22 ` [PATCH 4/4] drm/i915: reorganize the get_cdclk assignment Paulo Zanoni
2017-02-17 14:05   ` Ville Syrjälä [this message]
2017-02-17 15:17     ` Paulo Zanoni
2017-02-17 15:28       ` Ville Syrjälä
2017-02-17 15:22 ` ✓ Fi.CI.BAT: success for Small clocking code refactor Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170217140535.GR31595@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=paulo.r.zanoni@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox