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From: Tvrtko Ursulin <tursulin@ursulin.net>
To: Intel-gfx@lists.freedesktop.org
Subject: [CI 2/2] HAX enable guc submission for CI
Date: Thu,  9 Mar 2017 13:20:05 +0000	[thread overview]
Message-ID: <20170309132005.1317-2-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20170309132005.1317-1-tvrtko.ursulin@linux.intel.com>

From: Chris Wilson <chris@chris-wilson.co.uk>

---
 drivers/gpu/drm/i915/i915_params.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 2e9645e6555a..8fa96edddf9f 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -56,8 +56,8 @@ struct i915_params i915 __read_mostly = {
 	.verbose_state_checks = 1,
 	.nuclear_pageflip = 0,
 	.edp_vswing = 0,
-	.enable_guc_loading = 0,
-	.enable_guc_submission = 0,
+	.enable_guc_loading = 1,
+	.enable_guc_submission = 1,
 	.guc_log_level = -1,
 	.enable_dp_mst = true,
 	.inject_load_failure = 0,
-- 
2.9.3

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  reply	other threads:[~2017-03-09 13:20 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-09 13:20 [CI 1/2] drm/i915/guc: Fix request re-submission after reset Tvrtko Ursulin
2017-03-09 13:20 ` Tvrtko Ursulin [this message]
2017-03-09 16:47 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/2] " Patchwork
2017-03-09 20:55   ` Chris Wilson
2017-03-10  7:53     ` Tvrtko Ursulin
  -- strict thread matches above, loose matches on Subject: below --
2018-03-28 20:58 [CI 1/2] drm/i915/guc: enable guc interrupts unconditionally in uc_resume Michel Thierry
2018-03-28 20:58 ` [CI 2/2] HAX enable GuC submission for CI Michel Thierry
2017-03-09 10:16 [CI 1/2] drm/i915: Initialize pm_intr_keep during intel_irq_init for GuC Chris Wilson
2017-03-09 10:16 ` [CI 2/2] HAX enable guc submission for CI Chris Wilson
2017-01-12 11:00 [CI 1/2] drm/i915: Invalidate the guc ggtt TLB upon insertion Chris Wilson
2017-01-12 11:00 ` [CI 2/2] HAX enable guc submission for CI Chris Wilson

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