From: Imre Deak <imre.deak@intel.com>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 15/15] drm/i915: Simplify cursor register write sequence
Date: Sat, 6 May 2017 00:31:50 +0300 [thread overview]
Message-ID: <20170505213150.GD24641@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <20170327185546.2977-16-ville.syrjala@linux.intel.com>
On Mon, Mar 27, 2017 at 09:55:46PM +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> It looks like simply writing all the cursor register every single
> time might be slightly faster than checking to see of each of
> them need to be written. So if any other register apart from
> CURPOS needs to be written let's just write all the registers.
>
> CURPOS is left as a special case mainly for 845/865 where we have to
> disable the cursor to change many of the cursor parameters. This
> introduces a slight chance of the cursor flickering when things get
> updated (since we're not currently doing the vblank evade for cursor
> updates). If we write CURPOS alone then that obviously can't happen.
> And let's follow the same pattern in the i9xx code just for symmetry.
> I wasn't able to see a singificant performance difference between
> this and just writing all the registers unconditionally.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 69 ++++++++++++++++++------------------
> 1 file changed, 34 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index d78ab0d35274..40ac0f938a4e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9323,36 +9323,28 @@ static void i845_update_cursor(struct intel_plane *plane,
>
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> - if (plane->cursor.cntl != 0 &&
> - (plane->cursor.base != base ||
> - plane->cursor.size != size ||
> - plane->cursor.cntl != cntl)) {
> - /* On these chipsets we can only modify the base/size/stride
> - * whilst the cursor is disabled.
> - */
> + /* On these chipsets we can only modify the base/size/stride
> + * whilst the cursor is disabled.
> + */
> + if (plane->cursor.base != base ||
> + plane->cursor.size != size ||
> + plane->cursor.cntl != cntl) {
> I915_WRITE_FW(CURCNTR(PIPE_A), 0);
> - plane->cursor.cntl = 0;
> - }
> -
> - if (plane->cursor.base != base)
> I915_WRITE_FW(CURBASE(PIPE_A), base);
> -
> - if (plane->cursor.size != size)
> I915_WRITE_FW(CURSIZE, size);
> -
> - if (cntl)
> I915_WRITE_FW(CURPOS(PIPE_A), pos);
> -
> - if (plane->cursor.cntl != cntl)
> I915_WRITE_FW(CURCNTR(PIPE_A), cntl);
>
> + plane->cursor.base = base;
> + plane->cursor.size = size;
> + plane->cursor.cntl = cntl;
> + } else {
> + I915_WRITE_FW(CURPOS(PIPE_A), pos);
> + }
> +
> POSTING_READ_FW(CURCNTR(PIPE_A));
>
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> -
> - plane->cursor.cntl = cntl;
> - plane->cursor.base = base;
> - plane->cursor.size = size;
> }
>
> static void i845_disable_cursor(struct intel_plane *plane,
> @@ -9508,27 +9500,34 @@ static void i9xx_update_cursor(struct intel_plane *plane,
>
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> - if (plane->cursor.cntl != cntl)
> + /*
> + * On some platforms writing CURCNTR first will also
> + * cause CURPOS to be armed by the CURBASE write.
> + * Without the CURCNTR write the CURPOS write would
> + * arm itself.
> + *
> + * CURCNTR and CUR_FBC_CTL are always
> + * armed by the CURBASE write only.
> + */
> + if (plane->cursor.base != base ||
> + plane->cursor.size != fbc_ctl ||
> + plane->cursor.cntl != cntl) {
> I915_WRITE_FW(CURCNTR(pipe), cntl);
> -
> - if (plane->cursor.size != fbc_ctl)
> - I915_WRITE_FW(CUR_FBC_CTL(pipe), fbc_ctl);
> -
> - if (cntl)
> + if (HAS_CUR_FBC(dev_priv))
> + I915_WRITE_FW(CUR_FBC_CTL(pipe), fbc_ctl);
> I915_WRITE_FW(CURPOS(pipe), pos);
> -
> - if (plane->cursor.cntl != cntl ||
> - plane->cursor.size != fbc_ctl ||
> - plane->cursor.base != base)
> I915_WRITE_FW(CURBASE(pipe), base);
>
> + plane->cursor.base = base;
> + plane->cursor.size = fbc_ctl;
> + plane->cursor.cntl = cntl;
> + } else {
> + I915_WRITE_FW(CURPOS(pipe), pos);
> + }
> +
> POSTING_READ_FW(CURBASE(pipe));
>
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> -
> - plane->cursor.cntl = cntl;
> - plane->cursor.base = base;
> - plane->cursor.size = fbc_ctl;
> }
>
> static void i9xx_disable_cursor(struct intel_plane *plane,
> --
> 2.10.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2017-05-05 21:31 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-27 18:55 [PATCH v2 00/15] drm/i915: Cursor code cleanup and cursor "FBC" support for IVB+ (v2) ville.syrjala
2017-03-27 18:55 ` [PATCH 01/15] drm/i915: Parametrize cursor/primary pipe select bits ville.syrjala
2017-03-27 18:55 ` [PATCH 02/15] drm/i915: Pass intel_plane and intel_crtc to plane hooks ville.syrjala
2017-03-27 18:55 ` [PATCH v2 03/15] drm/i915: Refactor CURBASE calculation ville.syrjala
2017-03-27 18:55 ` [PATCH 04/15] drm/i915: Clean up cursor junk from intel_crtc ville.syrjala
2017-05-04 19:42 ` Imre Deak
2017-03-27 18:55 ` [PATCH v2 05/15] drm/i915: Refactor CURPOS calculation ville.syrjala
2017-03-27 18:55 ` [PATCH v2 06/15] drm/i915: Move cursor position and base handling into the platform specific functions ville.syrjala
2017-03-27 18:55 ` [PATCH v2 07/15] drm/i915: Drop useless posting reads from cursor commit ville.syrjala
2017-03-27 18:55 ` [PATCH v2 08/15] drm/i915: Split cursor check_plane into i845 and i9xx variants ville.syrjala
2017-03-27 18:55 ` [PATCH 09/15] drm/i915: Generalize cursor size checks a bit ville.syrjala
2017-05-05 13:57 ` Imre Deak
2017-03-27 18:55 ` [PATCH v2 10/15] drm/i915: Use fb->pitches[0] in cursor code ville.syrjala
2017-03-27 18:55 ` [PATCH v7 11/15] drm/i915: Support variable cursor height on ivb+ ville.syrjala
2017-05-05 15:42 ` Imre Deak
2017-03-27 18:55 ` [PATCH 12/15] drm/i915: Fix gen3 physical cursor alignment requirements ville.syrjala
2017-05-05 17:48 ` Imre Deak
2017-03-27 18:55 ` [PATCH 13/15] drm/i915: Handle fb offset and src coordinates for cursors ville.syrjala
2017-05-05 20:53 ` Imre Deak
2017-03-27 18:55 ` [PATCH 14/15] drm/i915: Relax 845/865 CURBASE alignemnt requirement to 32 bytes ville.syrjala
2017-05-05 21:17 ` Imre Deak
2017-03-27 18:55 ` [PATCH 15/15] drm/i915: Simplify cursor register write sequence ville.syrjala
2017-05-05 21:31 ` Imre Deak [this message]
2017-05-10 16:38 ` Ville Syrjälä
2017-03-27 19:14 ` ✓ Fi.CI.BAT: success for drm/i915: Cursor code cleanup and cursor "FBC" support for IVB+ (rev2) Patchwork
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