From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH] drm/915/psr: Set psr.source_ok during atomic_check
Date: Tue, 12 Dec 2017 16:59:34 -0800 [thread overview]
Message-ID: <20171213005934.7010-1-dhinakaran.pandiyan@intel.com> (raw)
Since commit 4d90f2d507ab ("drm/i915: Start tracking PSR state in crtc
state"), we check whether PSR can be enabled or not in
psr_compute_config(). Given that the psr.source_ok field is supposed to
track this check, set the field in psr_compute_config() as well.
Now tests can distinguish between PSR not enabled due to unmet mode
requirements and something going wrong during commit.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index a1ad85fa5c1a..b59a956047ff 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -358,6 +358,8 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
&crtc_state->base.adjusted_mode;
int psr_setup_time;
+ dev_priv->psr.source_ok = false;
+
if (!HAS_PSR(dev_priv))
return;
@@ -420,7 +422,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
* caps during eDP detection.
*/
if (!dev_priv->psr.psr2_support) {
- crtc_state->has_psr = true;
+ dev_priv->psr.source_ok = (crtc_state->has_psr = true);
return;
}
@@ -440,7 +442,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
return;
}
- crtc_state->has_psr = true;
+ dev_priv->psr.source_ok = (crtc_state->has_psr = true);
crtc_state->has_psr2 = true;
}
@@ -522,8 +524,6 @@ void intel_psr_enable(struct intel_dp *intel_dp,
}
dev_priv->psr.psr2_support = crtc_state->has_psr2;
- dev_priv->psr.source_ok = true;
-
dev_priv->psr.busy_frontbuffer_bits = 0;
dev_priv->psr.setup_vsc(intel_dp, crtc_state);
@@ -657,7 +657,7 @@ void intel_psr_disable(struct intel_dp *intel_dp,
/* Disable PSR on Sink */
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
- dev_priv->psr.enabled = NULL;
+ dev_priv->psr.source_ok = (dev_priv->psr.enabled = NULL);
mutex_unlock(&dev_priv->psr.lock);
cancel_delayed_work_sync(&dev_priv->psr.work);
--
2.11.0
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next reply other threads:[~2017-12-13 0:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-13 0:59 Dhinakaran Pandiyan [this message]
2017-12-13 1:28 ` ✓ Fi.CI.BAT: success for drm/915/psr: Set psr.source_ok during atomic_check Patchwork
2017-12-13 2:15 ` ✓ Fi.CI.IGT: " Patchwork
2017-12-14 15:06 ` [PATCH] " Ville Syrjälä
2017-12-14 19:50 ` Pandiyan, Dhinakaran
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