Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Avoid setting redundant INIT power domain mask for DC_OFF wells
Date: Tue, 19 Dec 2017 14:01:31 -0800	[thread overview]
Message-ID: <20171219220131.vsqyfyxrhqcic5un@intel.com> (raw)
In-Reply-To: <20171212215209.20232-1-dhinakaran.pandiyan@intel.com>

On Tue, Dec 12, 2017 at 09:52:09PM +0000, Dhinakaran Pandiyan wrote:
> The POWER_DOMAIN_INIT bit is already set in _POWERWELL_2_POWER_DOMAINS,
> which is included in _DC_OFF_POWER_DOMAINS. So, avoid setting that again
> in _DC_OFF_POWER_DOMAINS and shuffle the macros a bit to make it easy to
> notice relation.
> 
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 20 ++++++++------------
>  1 file changed, 8 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 96ab74f3d101..eb4b12989c84 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -1706,11 +1706,10 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
>  	BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO) |		\
>  	BIT_ULL(POWER_DOMAIN_INIT))
>  #define SKL_DISPLAY_DC_OFF_POWER_DOMAINS (		\
> -	SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS |		\
>  	BIT_ULL(POWER_DOMAIN_GT_IRQ) |			\
>  	BIT_ULL(POWER_DOMAIN_MODESET) |			\
>  	BIT_ULL(POWER_DOMAIN_AUX_A) |			\
> -	BIT_ULL(POWER_DOMAIN_INIT))
> +	SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS)
>  
>  #define BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS (		\
>  	BIT_ULL(POWER_DOMAIN_TRANSCODER_A) |		\
> @@ -1728,12 +1727,6 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
>  	BIT_ULL(POWER_DOMAIN_VGA) |				\
>  	BIT_ULL(POWER_DOMAIN_GMBUS) |			\
>  	BIT_ULL(POWER_DOMAIN_INIT))
> -#define BXT_DISPLAY_DC_OFF_POWER_DOMAINS (		\
> -	BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS |		\
> -	BIT_ULL(POWER_DOMAIN_GT_IRQ) |			\
> -	BIT_ULL(POWER_DOMAIN_MODESET) |			\
> -	BIT_ULL(POWER_DOMAIN_AUX_A) |			\
> -	BIT_ULL(POWER_DOMAIN_INIT))
>  #define BXT_DPIO_CMN_A_POWER_DOMAINS (			\
>  	BIT_ULL(POWER_DOMAIN_PORT_DDI_A_LANES) |		\
>  	BIT_ULL(POWER_DOMAIN_AUX_A) |			\
> @@ -1744,6 +1737,11 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
>  	BIT_ULL(POWER_DOMAIN_AUX_B) |			\
>  	BIT_ULL(POWER_DOMAIN_AUX_C) |			\
>  	BIT_ULL(POWER_DOMAIN_INIT))
> +#define BXT_DISPLAY_DC_OFF_POWER_DOMAINS (		\
> +	BIT_ULL(POWER_DOMAIN_GT_IRQ) |			\
> +	BIT_ULL(POWER_DOMAIN_MODESET) |			\
> +	BIT_ULL(POWER_DOMAIN_AUX_A) |			\
> +	BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS)

why did you move the entire block below?

>  
>  #define GLK_DISPLAY_POWERWELL_2_POWER_DOMAINS (		\
>  	BIT_ULL(POWER_DOMAIN_TRANSCODER_A) |		\
> @@ -1788,11 +1786,10 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
>  	BIT_ULL(POWER_DOMAIN_AUX_C) |		\
>  	BIT_ULL(POWER_DOMAIN_INIT))
>  #define GLK_DISPLAY_DC_OFF_POWER_DOMAINS (		\
> -	GLK_DISPLAY_POWERWELL_2_POWER_DOMAINS |		\
>  	BIT_ULL(POWER_DOMAIN_GT_IRQ) |			\
>  	BIT_ULL(POWER_DOMAIN_MODESET) |			\
>  	BIT_ULL(POWER_DOMAIN_AUX_A) |			\
> -	BIT_ULL(POWER_DOMAIN_INIT))
> +	GLK_DISPLAY_POWERWELL_2_POWER_DOMAINS)
>  
>  #define CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS (		\
>  	BIT_ULL(POWER_DOMAIN_TRANSCODER_A) |		\
> @@ -1836,10 +1833,9 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
>  	BIT_ULL(POWER_DOMAIN_AUX_D) |			\
>  	BIT_ULL(POWER_DOMAIN_INIT))
>  #define CNL_DISPLAY_DC_OFF_POWER_DOMAINS (		\
> -	CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS |		\
>  	BIT_ULL(POWER_DOMAIN_MODESET) |			\
>  	BIT_ULL(POWER_DOMAIN_AUX_A) |			\
> -	BIT_ULL(POWER_DOMAIN_INIT))
> +	CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS)
>  
>  static const struct i915_power_well_ops i9xx_always_on_power_well_ops = {
>  	.sync_hw = i9xx_power_well_sync_hw_noop,
> -- 
> 2.11.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2017-12-19 22:01 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-12 21:52 [PATCH] drm/i915: Avoid setting redundant INIT power domain mask for DC_OFF wells Dhinakaran Pandiyan
2017-12-12 22:20 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-12-12 23:24 ` ✓ Fi.CI.IGT: " Patchwork
2017-12-19 22:01 ` Rodrigo Vivi [this message]
2017-12-19 23:25   ` [PATCH] " Pandiyan, Dhinakaran

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171219220131.vsqyfyxrhqcic5un@intel.com \
    --to=rodrigo.vivi@intel.com \
    --cc=dhinakaran.pandiyan@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox