From: David Weinehall <david.weinehall@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [PATCH 09/10] drm/i915/cnl: Enable DDI-F on Cannonlake.
Date: Fri, 26 Jan 2018 17:29:04 +0200 [thread overview]
Message-ID: <20180126152904.GB13657@boom> (raw)
In-Reply-To: <20180125220330.15676-9-rodrigo.vivi@intel.com>
On Thu, Jan 25, 2018 at 02:03:29PM -0800, Rodrigo Vivi wrote:
> Now let's finish the Port-F support by adding the
> proper port F detection, irq and power well support.
lgtm,
Reviewed-by: David Weinehall <david.weinehall@linux.intel.com>
> v2: Rebase
> v3: Use BIT_ULL
> v4: Cover missed case on ddi init.
> v5: Update commit message.
> v6: Rebase on top of display headers rework.
> v7: Squash power-well handling related to DDI F to this
> patch to avoid warns as pointed out by DK.
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> drivers/gpu/drm/i915/intel_ddi.c | 4 ++++
> drivers/gpu/drm/i915/intel_display.c | 6 +++++-
> drivers/gpu/drm/i915/intel_display.h | 2 ++
> drivers/gpu/drm/i915/intel_runtime_pm.c | 19 ++++++++++++++++---
> 5 files changed, 29 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 076a49107e02..8261fe4c4316 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1304,6 +1304,7 @@ enum i915_power_well_id {
> SKL_DISP_PW_DDI_B,
> SKL_DISP_PW_DDI_C,
> SKL_DISP_PW_DDI_D,
> + CNL_DISP_PW_DDI_F = 6,
>
> GLK_DISP_PW_AUX_A = 8,
> GLK_DISP_PW_AUX_B,
> @@ -8945,6 +8946,7 @@ enum skl_power_gate {
> #define SFUSE_STRAP_RAW_FREQUENCY (1<<8)
> #define SFUSE_STRAP_DISPLAY_DISABLED (1<<7)
> #define SFUSE_STRAP_CRT_DISABLED (1<<6)
> +#define SFUSE_STRAP_DDIF_DETECTED (1<<3)
> #define SFUSE_STRAP_DDIB_DETECTED (1<<2)
> #define SFUSE_STRAP_DDIC_DETECTED (1<<1)
> #define SFUSE_STRAP_DDID_DETECTED (1<<0)
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index e51559be2e3b..cfcd9cb37d5d 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2946,6 +2946,10 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> intel_dig_port->ddi_io_power_domain =
> POWER_DOMAIN_PORT_DDI_E_IO;
> break;
> + case PORT_F:
> + intel_dig_port->ddi_io_power_domain =
> + POWER_DOMAIN_PORT_DDI_F_IO;
> + break;
> default:
> MISSING_CASE(port);
> }
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 83de43ce1f3b..fe3c09184c2e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5647,6 +5647,8 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port)
> return POWER_DOMAIN_PORT_DDI_D_LANES;
> case PORT_E:
> return POWER_DOMAIN_PORT_DDI_E_LANES;
> + case PORT_F:
> + return POWER_DOMAIN_PORT_DDI_F_LANES;
> default:
> MISSING_CASE(port);
> return POWER_DOMAIN_PORT_OTHER;
> @@ -13619,7 +13621,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
> if (found || IS_GEN9_BC(dev_priv))
> intel_ddi_init(dev_priv, PORT_A);
>
> - /* DDI B, C and D detection is indicated by the SFUSE_STRAP
> + /* DDI B, C, D, and F detection is indicated by the SFUSE_STRAP
> * register */
> found = I915_READ(SFUSE_STRAP);
>
> @@ -13629,6 +13631,8 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
> intel_ddi_init(dev_priv, PORT_C);
> if (found & SFUSE_STRAP_DDID_DETECTED)
> intel_ddi_init(dev_priv, PORT_D);
> + if (found & SFUSE_STRAP_DDIF_DETECTED)
> + intel_ddi_init(dev_priv, PORT_F);
> /*
> * On SKL we don't have a way to detect DDI-E so we rely on VBT.
> */
> diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
> index 30fa2041a45f..c4042e342f50 100644
> --- a/drivers/gpu/drm/i915/intel_display.h
> +++ b/drivers/gpu/drm/i915/intel_display.h
> @@ -157,11 +157,13 @@ enum intel_display_power_domain {
> POWER_DOMAIN_PORT_DDI_C_LANES,
> POWER_DOMAIN_PORT_DDI_D_LANES,
> POWER_DOMAIN_PORT_DDI_E_LANES,
> + POWER_DOMAIN_PORT_DDI_F_LANES,
> POWER_DOMAIN_PORT_DDI_A_IO,
> POWER_DOMAIN_PORT_DDI_B_IO,
> POWER_DOMAIN_PORT_DDI_C_IO,
> POWER_DOMAIN_PORT_DDI_D_IO,
> POWER_DOMAIN_PORT_DDI_E_IO,
> + POWER_DOMAIN_PORT_DDI_F_IO,
> POWER_DOMAIN_PORT_DSI,
> POWER_DOMAIN_PORT_CRT,
> POWER_DOMAIN_PORT_OTHER,
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 3526b563b8ec..30e50ea16960 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -94,6 +94,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> return "PORT_DDI_D_LANES";
> case POWER_DOMAIN_PORT_DDI_E_LANES:
> return "PORT_DDI_E_LANES";
> + case POWER_DOMAIN_PORT_DDI_F_LANES:
> + return "PORT_DDI_F_LANES";
> case POWER_DOMAIN_PORT_DDI_A_IO:
> return "PORT_DDI_A_IO";
> case POWER_DOMAIN_PORT_DDI_B_IO:
> @@ -104,6 +106,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> return "PORT_DDI_D_IO";
> case POWER_DOMAIN_PORT_DDI_E_IO:
> return "PORT_DDI_E_IO";
> + case POWER_DOMAIN_PORT_DDI_F_IO:
> + return "PORT_DDI_F_IO";
> case POWER_DOMAIN_PORT_DSI:
> return "PORT_DSI";
> case POWER_DOMAIN_PORT_CRT:
> @@ -1860,6 +1864,9 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \
> BIT_ULL(POWER_DOMAIN_AUX_F) | \
> BIT_ULL(POWER_DOMAIN_INIT))
> +#define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \
> + BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \
> + BIT_ULL(POWER_DOMAIN_INIT))
> #define CNL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS | \
> BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
> @@ -2411,6 +2418,12 @@ static struct i915_power_well cnl_power_wells[] = {
> .id = SKL_DISP_PW_DDI_D,
> },
> {
> + .name = "DDI F IO power well",
> + .domains = CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS,
> + .ops = &hsw_power_well_ops,
> + .id = CNL_DISP_PW_DDI_F,
> + },
> + {
> .name = "AUX F",
> .domains = CNL_DISPLAY_AUX_F_POWER_DOMAINS,
> .ops = &hsw_power_well_ops,
> @@ -2533,13 +2546,13 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
> set_power_wells(power_domains, cnl_power_wells);
>
> /*
> - * Aux IO is getting enabled for all ports
> + * DDI and Aux IO are getting enabled for all ports
> * regardless the presence or use. So, in order to avoid
> - * timeouts, lets remove it from the list
> + * timeouts, lets remove them from the list
> * for the SKUs without port F.
> */
> if (!IS_CNL_WITH_PORT_F(dev_priv))
> - power_domains->power_well_count -= 1;
> + power_domains->power_well_count -= 2;
>
> } else if (IS_BROXTON(dev_priv)) {
> set_power_wells(power_domains, bxt_power_wells);
> --
> 2.13.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2018-01-26 15:29 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-25 22:03 [PATCH 01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Rodrigo Vivi
2018-01-25 22:03 ` [PATCH 02/10] drm/i915/cnl: Add AUX-F support Rodrigo Vivi
2018-01-26 15:09 ` David Weinehall
2018-01-26 17:15 ` [PATCH] " Rodrigo Vivi
2018-01-26 21:27 ` Pandiyan, Dhinakaran
2018-01-26 21:58 ` Rodrigo Vivi
2018-01-27 1:27 ` Rodrigo Vivi
2018-01-29 20:35 ` Pandiyan, Dhinakaran
2018-01-25 22:03 ` [PATCH 03/10] drm/i915/cnl: Extend Wa 1178 to Aux F Rodrigo Vivi
2018-01-25 22:03 ` [PATCH 04/10] drm/i915/cnl: Fix _CNL_PORT_TX_DW2_LN0_F definition Rodrigo Vivi
2018-01-25 22:03 ` [PATCH 05/10] drm/i915: Fix DPLCLKA_CFGCR0 bits for Port F Rodrigo Vivi
2018-01-25 22:03 ` [PATCH 06/10] drm/i915/cnl: Add right GMBUS pin number for HDMI on " Rodrigo Vivi
2018-01-25 22:03 ` [PATCH 07/10] drm/i915: For HPD connected port use hpd_pin instead of port Rodrigo Vivi
2018-01-25 22:03 ` [PATCH 08/10] drm/i915/cnl: Add HPD support for Port F Rodrigo Vivi
2018-01-25 22:03 ` [PATCH 09/10] drm/i915/cnl: Enable DDI-F on Cannonlake Rodrigo Vivi
2018-01-26 15:29 ` David Weinehall [this message]
2018-01-26 21:39 ` Pandiyan, Dhinakaran
2018-01-26 22:06 ` Rodrigo Vivi
2018-01-26 22:46 ` Imre Deak
2018-01-27 1:33 ` [PATCH] " Rodrigo Vivi
2018-01-29 22:00 ` Pandiyan, Dhinakaran
2018-01-25 22:03 ` [PATCH 10/10] drm/i915/cnl: Fix DP max rate for Cannonlake with port F Rodrigo Vivi
2018-01-25 22:28 ` ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Patchwork
2018-01-25 23:27 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-01-26 17:35 ` ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. (rev2) Patchwork
2018-01-26 18:22 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-01-27 1:50 ` ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. (rev3) Patchwork
2018-01-27 2:08 ` ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. (rev4) Patchwork
2018-01-27 2:55 ` ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2018-01-29 23:22 [PATCH 01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Rodrigo Vivi
2018-01-29 23:22 ` [PATCH 09/10] drm/i915/cnl: Enable DDI-F on Cannonlake Rodrigo Vivi
2018-01-25 19:27 [PATCH 01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Rodrigo Vivi
2018-01-25 19:27 ` [PATCH 09/10] drm/i915/cnl: Enable DDI-F on Cannonlake Rodrigo Vivi
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