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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv()
Date: Thu, 22 Feb 2018 23:20:40 +0200	[thread overview]
Message-ID: <20180222212040.GE5453@intel.com> (raw)
In-Reply-To: <20180222181036.15251-7-ville.syrjala@linux.intel.com>

On Thu, Feb 22, 2018 at 08:10:35PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Let's try to keep the details on the AKSV stuff concentrated
> in one place. So move the control bit and +5 data size handling
> there.
> 
> Cc: Sean Paul <seanpaul@chromium.org>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 42 +++++++++++++----------------------------
>  1 file changed, 13 insertions(+), 29 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 217cc6aee477..328a03f14d8a 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1059,29 +1059,11 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp,
>  	       DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
>  }
>  
> -static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
> -					  bool has_aux_irq,
> -					  int send_bytes,
> -					  uint32_t aux_clock_divider,
> -					  bool aksv_write)
> -{
> -	uint32_t val = 0;
> -
> -	if (aksv_write) {
> -		send_bytes += 5;
> -		val |= DP_AUX_CH_CTL_AUX_AKSV_SELECT;
> -	}
> -
> -	return val | intel_dp->get_aux_send_ctl(intel_dp,
> -						has_aux_irq,
> -						send_bytes,
> -						aux_clock_divider);
> -}
> -
>  static int
>  intel_dp_aux_xfer(struct intel_dp *intel_dp,
>  		  const uint8_t *send, int send_bytes,
> -		  uint8_t *recv, int recv_size, bool aksv_write)
> +		  uint8_t *recv, int recv_size,
> +		  u32 aux_send_ctl_flags)
>  {
>  	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
>  	struct drm_i915_private *dev_priv =
> @@ -1145,11 +1127,12 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
>  	}
>  
>  	while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {
> -		u32 send_ctl = intel_dp_get_aux_send_ctl(intel_dp,
> -							 has_aux_irq,
> -							 send_bytes,
> -							 aux_clock_divider,
> -							 aksv_write);
> +		u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
> +							  has_aux_irq,
> +							  send_bytes,
> +							  aux_clock_divider);
> +
> +		send_ctl |= aux_send_ctl_flags;

Actually I just realized this doesn't quite do what I wanted. Since
I now pass the full msg size this guy wants to load all of it into
the aux data registers. Since txbuf[] is on the stack we should just
end up loading some stack garbage which I suppose is fine from the 
hardware POV (it should just ignore data right?).

But still perhaps not the best approach to access beyond the buffer
on the stack. So the fix would be to make txbuf[] five bytes longer
and maybe zeroing it to avoid loading stack garbage into the
registers.

>  
>  		/* Must try at least 3 times according to DP spec */
>  		for (try = 0; try < 5; try++) {
> @@ -1287,7 +1270,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>  			memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
>  
>  		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
> -					rxbuf, rxsize, false);
> +					rxbuf, rxsize, 0);
>  		if (ret > 0) {
>  			msg->reply = rxbuf[0] >> 4;
>  
> @@ -1310,7 +1293,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
>  			return -E2BIG;
>  
>  		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
> -					rxbuf, rxsize, false);
> +					rxbuf, rxsize, 0);
>  		if (ret > 0) {
>  			msg->reply = rxbuf[0] >> 4;
>  			/*
> @@ -5109,8 +5092,9 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
>  	txbuf[2] = DP_AUX_HDCP_AKSV & 0xff;
>  	txbuf[3] = DRM_HDCP_KSV_LEN - 1;
>  
> -	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
> -				rxbuf, sizeof(rxbuf), true);
> +	ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf) + 5,
> +				rxbuf, sizeof(rxbuf),
> +				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
>  	if (ret < 0) {
>  		DRM_ERROR("Write Aksv over DP/AUX failed (%d)\n", ret);
>  		return ret;
> -- 
> 2.13.6

-- 
Ville Syrjälä
Intel OTC
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  reply	other threads:[~2018-02-22 21:20 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-22 18:10 [PATCH 1/8] drm/i915: Use the correct power domain for aux ch Ville Syrjala
2018-02-22 18:10 ` [PATCH 2/8] drm/i915: Add enum aux_ch and clean up the aux init to use it Ville Syrjala
2018-02-22 18:10 ` [PATCH 3/8] drm/i915: Nuke aux regs from intel_dp Ville Syrjala
2018-02-22 18:10 ` [PATCH 4/8] drm/i915: Collect aux ch vfunc setup into intel_dp_aux_init() Ville Syrjala
2018-02-23 15:31   ` Ville Syrjälä
2018-02-22 18:10 ` [PATCH 5/8] drm/i915: Consult aux_ch instead of port in ->get_aux_clock_divider() Ville Syrjala
2018-02-28 16:19   ` Ville Syrjälä
2018-02-22 18:10 ` [PATCH 6/8] drm/i915: s/intel_dp_aux_ch/intel_dp_aux_xfer/ Ville Syrjala
2018-02-22 18:10 ` [PATCH 7/8] drm/i915: Keep the AKSV details in intel_dp_hdcp_write_an_aksv() Ville Syrjala
2018-02-22 21:20   ` Ville Syrjälä [this message]
2018-02-22 21:27   ` [PATCH v2 " Ville Syrjala
2018-02-23 11:10     ` Ramalingam C
2018-02-23 13:46       ` Ville Syrjälä
2018-02-23 14:44         ` Ramalingam C
2018-03-02 16:30           ` Ville Syrjälä
2018-02-22 18:10 ` [PATCH 8/8] drm/i915: Deduplicate the code to fill the aux message header Ville Syrjala
2018-02-22 21:28   ` [PATCH v2 " Ville Syrjala
2018-02-23 11:19     ` Ramalingam C
2018-02-22 18:38 ` ✗ Fi.CI.BAT: failure for series starting with [1/8] drm/i915: Use the correct power domain for aux ch Patchwork
2018-02-22 19:42 ` ✓ Fi.CI.BAT: success " Patchwork
2018-02-22 21:59 ` ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3) Patchwork
2018-02-23  2:29 ` ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch Patchwork
2018-02-23  5:19 ` ✗ Fi.CI.IGT: warning for series starting with [1/8] drm/i915: Use the correct power domain for aux ch (rev3) Patchwork
2018-02-23 13:58   ` Ville Syrjälä

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