Re: [PATCH 00/10] Enabling VDSC in i915 driver for GLK

From: Manasi Navare <manasi.d.navare@intel.com>
To: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 00/10] Enabling VDSC in i915 driver for GLK
Date: Fri, 23 Feb 2018 14:53:30 -0800	[thread overview]
Message-ID: <20180223225329.GF27268@intel.com> (raw)
In-Reply-To: <1519401353-25029-1-git-send-email-gaurav.k.singh@intel.com>

Thanks for the patches. I am working on the DSC support on i915 for eDP/DP
as well. Looking at the patches below, this is specific to VDSC enabling for eDP
panels and not for the external DP.
So please mention that specifically in the cover letter as well.

On Fri, Feb 23, 2018 at 09:25:43PM +0530, Gaurav K Singh wrote:
> Display  manufacturers are turning to higher-resolution displays
> to differentiate their products. The increased pixel counts have
> required increased bandwidth over the links that drive these displays.
> However, advances in physical layer technology have not kept up 
> with the increases in pixel counts.
> 
> These factors have created a need for compression on display links.
> The Video Electronics Standards Association(VESA),in liaison with the
> MIPI Alliance, has developed an industry standard Display Stream Compression(DSC)
> for interoperable, visually lossless compression over display links.
> 
> These patches enable VDSC in i915 gfx driver for Gen9,Gen10 platforms

Please specify that this enables VDSC for eDp in i915 gfx driver.

> and provide basic code for future platforms.
> 
> Testing:
> Did testing on GLK RVP. By default GLK RVP has non-DSC EDP panel, there was no regression with these patches.
> 
> BA Chrome Team (OTC) do not have EDP panel which supports DSC.
> Trying to arrrage DSC EDP panel from other teams in BA, hopeful to get it in few weeks.
>

I do have a DSC eDP panel here in Oregon and can volunteer for testing your patches with that on GLK RVP.

Manasi

> Dropping the patches to get the review started.
> 
> Gaurav K Singh (10):
>   drm: i915: Defining Compression Capabilities
>   drm: i915: Get DSC capability from DP sink
>   drm: i915: Enable/Disable DSC in DP sink
>   drm: i915: Compute RC & DSC parameters
>   drm: i915: Define Picture Parameter Set
>   drm/i915: Populate PPS Secondary Data Pkt for Sink
>   drm: i915: Define VDSC regs and DSC params
>   drm: i915: Enable VDSC in Source
>   drm: i915: Disable VDSC from Source
>   drm/i915: Encoder enable/disable seq wrt DSC
> 
>  drivers/gpu/drm/i915/Makefile        |    1 +
>  drivers/gpu/drm/i915/i915_drv.h      |  589 ++++++++++++++++
>  drivers/gpu/drm/i915/i915_reg.h      |  451 ++++++++++++
>  drivers/gpu/drm/i915/intel_ddi.c     |    4 +
>  drivers/gpu/drm/i915/intel_display.c |   20 +
>  drivers/gpu/drm/i915/intel_dp.c      |  182 +++++
>  drivers/gpu/drm/i915/intel_drv.h     |   64 ++
>  drivers/gpu/drm/i915/intel_vdsc.c    | 1243 ++++++++++++++++++++++++++++++++++
>  include/drm/drm_dp_helper.h          |    3 +
>  9 files changed, 2557 insertions(+)
>  create mode 100644 drivers/gpu/drm/i915/intel_vdsc.c
> 
> -- 
> 1.9.1
> 
> _______________________________________________
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