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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>,
	dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v3 09/10] drm/i915/psr: Set DPCD PSR2 enable bit when needed
Date: Fri, 30 Mar 2018 10:41:08 -0700	[thread overview]
Message-ID: <20180330174108.GH2338@intel.com> (raw)
In-Reply-To: <20180328223046.16125-9-jose.souza@intel.com>

On Wed, Mar 28, 2018 at 03:30:45PM -0700, José Roberto de Souza wrote:
> In the 2 eDP1.4a pannels tested set or not set bit have no effect
> but is better set it and comply with specification.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

patches 1-9 pushed to dinq. Thanks for patches and reviews.

> ---
> 
> v3: rebased
> 
>  drivers/gpu/drm/i915/intel_psr.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index d079cf0b034c..2d53f7398a6d 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -278,18 +278,19 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  	struct drm_device *dev = dig_port->base.base.dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> +	u8 dpcd_val = DP_PSR_ENABLE;
>  
>  	/* Enable ALPM at sink for psr2 */
>  	if (dev_priv->psr.psr2_enabled && dev_priv->psr.alpm)
>  		drm_dp_dpcd_writeb(&intel_dp->aux,
>  				DP_RECEIVER_ALPM_CONFIG,
>  				DP_ALPM_ENABLE);
> +
> +	if (dev_priv->psr.psr2_enabled)
> +		dpcd_val |= DP_PSR_ENABLE_PSR2;
>  	if (dev_priv->psr.link_standby)
> -		drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
> -				   DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE);
> -	else
> -		drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
> -				   DP_PSR_ENABLE);
> +		dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE;
> +	drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
>  
>  	drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0);
>  }
> -- 
> 2.16.3
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  reply	other threads:[~2018-03-30 17:41 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-28 22:30 [PATCH v3 01/10] drm: Add DP PSR2 sink enable bit José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 02/10] drm: Add DP last received PSR SDP VSC register and bits José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 03/10] drm/i915/psr: Nuke aux frame sync José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 04/10] drm/i915/psr: Tie PSR2 support to Y coordinate requirement José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 05/10] drm/i915/psr/cnl: Enable Y-coordinate support in source José Roberto de Souza
2018-03-30 17:36   ` Pandiyan, Dhinakaran
2018-03-30 17:49     ` Souza, Jose
2018-03-28 22:30 ` [PATCH v3 06/10] drm/i915/psr: Do not override PSR2 sink support José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 07/10] drm/i915/psr: Use PSR2 macro for PSR2 José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 08/10] drm/i915/psr: Cache sink synchronization latency José Roberto de Souza
2018-03-28 22:30 ` [PATCH v3 09/10] drm/i915/psr: Set DPCD PSR2 enable bit when needed José Roberto de Souza
2018-03-30 17:41   ` Rodrigo Vivi [this message]
2018-04-05  9:53     ` [Intel-gfx] " Chris Wilson
2018-03-28 22:30 ` [PATCH v3 10/10] drm/i915/debugfs: Print sink PSR status José Roberto de Souza
2018-03-30 18:28   ` Pandiyan, Dhinakaran
2018-03-30 19:19     ` [Intel-gfx] " Souza, Jose
2018-03-30 20:55       ` Pandiyan, Dhinakaran
2018-03-29  0:05 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,01/10] drm: Add DP PSR2 sink enable bit Patchwork
2018-03-29  0:20 ` ✗ Fi.CI.BAT: " Patchwork
2018-03-29 20:49 ` ✗ Fi.CI.CHECKPATCH: " Patchwork
2018-03-29 21:07 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-30  1:20 ` ✓ Fi.CI.IGT: " Patchwork

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