From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Subject: Re: [PATCH v4 2/5] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink
Date: Thu, 14 Jun 2018 14:09:34 -0700 [thread overview]
Message-ID: <20180614210934.GW8374@intel.com> (raw)
In-Reply-To: <20180614203433.5602-2-jose.souza@intel.com>
On Thu, Jun 14, 2018 at 01:34:30PM -0700, José Roberto de Souza wrote:
> eDP spec states that sink device will do a short pulse in HPD
> line when there is a PSR/PSR2 error that needs to be handled by
> source, this is handling the first and most simples error:
> DP_PSR_SINK_INTERNAL_ERROR.
>
> Here taking the safest approach and disabling PSR(at least until
> the next modeset), to avoid multiple rendering issues due to
> bad pannels.
>
> v4:
> Using CAN_PSR instead of HAS_PSR in intel_psr_short_pulse
>
> v3:
> disabling PSR instead of exiting on error
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 2 ++
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_psr.c | 60 ++++++++++++++++++++++++++------
> 3 files changed, 52 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 67875b00c8df..19585523e4ce 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4474,6 +4474,8 @@ intel_dp_short_pulse(struct intel_dp *intel_dp)
> if (intel_dp_needs_link_retrain(intel_dp))
> return false;
>
> + intel_psr_short_pulse(intel_dp);
> +
> if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) {
> DRM_DEBUG_KMS("Link Training Compliance Test requested\n");
> /* Send a Hotplug Uevent to userspace to start modeset */
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 8840108749a5..bb6ffdb282fd 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1926,6 +1926,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
> struct intel_crtc_state *crtc_state);
> void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool debug);
> void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir);
> +void intel_psr_short_pulse(struct intel_dp *intel_dp);
>
> /* intel_runtime_pm.c */
> int intel_power_domains_init(struct drm_i915_private *);
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index bc6d54f677dc..af5fcfd98a53 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -720,6 +720,23 @@ static void hsw_psr_disable(struct intel_dp *intel_dp)
> psr_aux_io_power_put(intel_dp);
> }
>
> +static void psr_disable(struct intel_dp *intel_dp)
what about intel_psr_disable_unlocked()?
> +{
> + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> + struct drm_device *dev = intel_dig_port->base.base.dev;
> + struct drm_i915_private *dev_priv = to_i915(dev);
assert it is locked here...
> +
> + if (!dev_priv->psr.enabled)
> + return;
> +
> + dev_priv->psr.disable_source(intel_dp);
> +
> + /* Disable PSR on Sink */
> + drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
> +
> + dev_priv->psr.enabled = NULL;
> +}
> +
> /**
> * intel_psr_disable - Disable PSR
> * @intel_dp: Intel DP
> @@ -741,17 +758,7 @@ void intel_psr_disable(struct intel_dp *intel_dp,
> return;
>
> mutex_lock(&dev_priv->psr.lock);
> - if (!dev_priv->psr.enabled) {
> - mutex_unlock(&dev_priv->psr.lock);
> - return;
> - }
> -
> - dev_priv->psr.disable_source(intel_dp);
> -
> - /* Disable PSR on Sink */
> - drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
> -
> - dev_priv->psr.enabled = NULL;
> + psr_disable(intel_dp);
> mutex_unlock(&dev_priv->psr.lock);
> }
>
> @@ -992,3 +999,34 @@ void intel_psr_init(struct drm_i915_private *dev_priv)
> dev_priv->psr.setup_vsc = hsw_psr_setup_vsc;
>
> }
> +
> +void intel_psr_short_pulse(struct intel_dp *intel_dp)
> +{
> + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> + struct drm_device *dev = intel_dig_port->base.base.dev;
> + struct drm_i915_private *dev_priv = to_i915(dev);
> + struct i915_psr *psr = &dev_priv->psr;
> + uint8_t val;
> +
> + if (!CAN_PSR(dev_priv) || !intel_dp_is_edp(intel_dp))
> + return;
> +
> + mutex_lock(&psr->lock);
> +
> + if (psr->enabled != intel_dp)
> + goto exit;
> +
> + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_STATUS, &val) != 1) {
> + DRM_ERROR("PSR_STATUS dpcd read failed\n");
> + goto exit;
> + }
> +
> + if ((val & DP_PSR_SINK_STATE_MASK) == DP_PSR_SINK_INTERNAL_ERROR) {
> + DRM_DEBUG_KMS("PSR sink internal error, disabling PSR\n");
> + psr_disable(intel_dp);
> + }
> +
> + /* TODO: handle other PSR/PSR2 errors */
> +exit:
> + mutex_unlock(&psr->lock);
> +}
> --
> 2.17.1
>
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next prev parent reply other threads:[~2018-06-14 21:09 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-14 20:34 [PATCH v4 1/5] drm/i915/psr: Remove intel_crtc_state parameter from disable() José Roberto de Souza
2018-06-14 20:34 ` [PATCH v4 2/5] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink José Roberto de Souza
2018-06-14 21:09 ` Rodrigo Vivi [this message]
2018-06-14 21:59 ` Dhinakaran Pandiyan
2018-06-14 23:46 ` Souza, Jose
2018-06-14 23:59 ` Rodrigo Vivi
2018-06-15 0:11 ` Souza, Jose
2018-06-15 5:16 ` Rodrigo Vivi
2018-06-14 20:34 ` [PATCH v4 3/5] drm/i915/psr: Handle PSR RFB storage error José Roberto de Souza
2018-06-14 20:34 ` [PATCH v4 4/5] drm/i915/psr: Avoid PSR exit max time timeout José Roberto de Souza
2018-06-14 21:13 ` Rodrigo Vivi
2018-06-14 21:50 ` Dhinakaran Pandiyan
2018-06-14 21:50 ` Rodrigo Vivi
2018-06-14 22:02 ` Dhinakaran Pandiyan
2018-06-14 20:34 ` [PATCH v4 5/5] drm/i915/psr/bdw+: Enable CRC check in the static frame on the sink side José Roberto de Souza
2018-06-14 21:19 ` Rodrigo Vivi
2018-06-14 21:54 ` Dhinakaran Pandiyan
2018-06-15 0:02 ` Souza, Jose
2018-06-15 5:14 ` Rodrigo Vivi
2018-06-14 20:42 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/5] drm/i915/psr: Remove intel_crtc_state parameter from disable() Patchwork
2018-06-14 20:44 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-06-14 20:57 ` ✓ Fi.CI.BAT: success " Patchwork
2018-06-15 5:49 ` ✓ Fi.CI.IGT: " Patchwork
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