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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Kumar, Mahesh" <mahesh1.kumar@intel.com>
Cc: intel-gfx@lists.freedesktop.org, rodrigo.vivi@intel.com
Subject: Re: [PATCH 3/3] drm/i915: Implement 16GB dimm wa for latency level-0
Date: Wed, 18 Jul 2018 15:04:20 +0300	[thread overview]
Message-ID: <20180718120420.GX5565@intel.com> (raw)
In-Reply-To: <32e4f4ae-9ceb-816f-d48b-35f4e4756d88@intel.com>

On Sat, Jul 14, 2018 at 07:40:43PM +0530, Kumar, Mahesh wrote:
> Hi,
> 
> Thanks for review.
> 
> 
> On 7/13/2018 8:27 PM, Ville Syrjälä wrote:
> > On Fri, Jul 13, 2018 at 07:41:24PM +0530, Mahesh Kumar wrote:
> >> Memory with 16GB dimms require an increase of 1us in level-0 latency.
> >> This patch implements the same.
> >> Bspec: 4381
> >>
> >> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> >> ---
> >>   drivers/gpu/drm/i915/i915_drv.c | 35 +++++++++++++++++++++++++++++++++--
> >>   drivers/gpu/drm/i915/i915_drv.h |  2 ++
> >>   drivers/gpu/drm/i915/intel_pm.c | 13 +++++++++++++
> >>   3 files changed, 48 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> >> index b93194cbd820..c6d30653d70c 100644
> >> --- a/drivers/gpu/drm/i915/i915_drv.c
> >> +++ b/drivers/gpu/drm/i915/i915_drv.c
> >> @@ -1063,6 +1063,29 @@ static void intel_sanitize_options(struct drm_i915_private *dev_priv)
> >>   	intel_gvt_sanitize_options(dev_priv);
> >>   }
> >>   
> >> +static void
> >> +intel_memdev_is_16gb_dimm(struct memdev_info *memdev_info,
> >> +			  u8 rank, u8 size, u8 width)
> >> +{
> >> +	bool found_16gb_dimm = false;
> >> +
> >> +	if (size == 16 && width == SKL_DRAM_WIDTH_X8 &&
> >> +	    rank == SKL_DRAM_RANK_SINGLE)
> >> +		found_16gb_dimm = true;
> >> +	else if (size == 32 && width == SKL_DRAM_WIDTH_X8 &&
> >> +		 rank == SKL_DRAM_RANK_DUAL)
> >> +		found_16gb_dimm = true;
> >> +	else if (size == 8 && width == SKL_DRAM_WIDTH_X16 &&
> >> +		 rank == SKL_DRAM_RANK_SINGLE)
> >> +		found_16gb_dimm = true;
> >> +	else if (size == 16 && width == SKL_DRAM_WIDTH_X16 &&
> >> +		 rank == SKL_DRAM_RANK_DUAL)
> >> +		found_16gb_dimm = true;
> >> +
> >> +	if (!memdev_info->is_16gb_dimm)
> >> +		memdev_info->is_16gb_dimm = found_16gb_dimm;
> >> +}
> > Pure functions are generally more fun. Would also make the function name
> > match the implementation.
> Are you suggesting to change the name to only "is_16gb_dimm" ?

I'm suggesting making it pure.

-- 
Ville Syrjälä
Intel
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  reply	other threads:[~2018-07-18 12:04 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-13 14:11 [PATCH 0/3] Decode memdev info and bandwidth and implemnt latency WA Mahesh Kumar
2018-07-13 14:11 ` [PATCH 1/3] drm/i915/bxt: Decode memory bandwidth and parameters Mahesh Kumar
2018-07-13 14:11 ` [PATCH 2/3] drm/i915/skl+: " Mahesh Kumar
2018-07-13 14:11 ` [PATCH 3/3] drm/i915: Implement 16GB dimm wa for latency level-0 Mahesh Kumar
2018-07-13 14:57   ` Ville Syrjälä
2018-07-14 14:10     ` Kumar, Mahesh
2018-07-18 12:04       ` Ville Syrjälä [this message]
2018-07-18 12:34         ` Kumar, Mahesh
2018-07-13 14:32 ` ✗ Fi.CI.SPARSE: warning for Decode memdev info and bandwidth and implemnt latency WA Patchwork
2018-07-13 14:46 ` ✓ Fi.CI.BAT: success " Patchwork
2018-07-13 14:51 ` [PATCH 0/3] " Ville Syrjälä
2018-07-14 14:12   ` Kumar, Mahesh
2018-07-18 12:03     ` Ville Syrjälä
2018-07-18 12:23       ` Kumar, Mahesh

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