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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Fix ICL HDMI clock readout
Date: Thu, 30 Aug 2018 18:48:45 +0300	[thread overview]
Message-ID: <20180830154845.GO5565@intel.com> (raw)
In-Reply-To: <20180828203621.GJ28554@intel.com>

On Tue, Aug 28, 2018 at 01:36:22PM -0700, Rodrigo Vivi wrote:
> On Tue, Aug 28, 2018 at 06:32:01PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Copy the 38.4 vs. 19.2 MHz ref clock exception from the dpll
> > mgr into the clock readout function as well.
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107722
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > index f3b115ce4029..68b301e6f41d 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -1416,6 +1416,13 @@ static int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv,
> >  
> >  	ref_clock = dev_priv->cdclk.hw.ref;
> 
> could we move this up to the beginning of the function and
> then reuse that if (INTEL_GEN(dev_priv) >= 11) {  block?

Possible? Sure. Clearer? Not so sure.

Probably the correct answer would be to add some kind of
cnl_pll_ref_clock() helper that encapsulats the magic exception,
and then use that from all the places that need it.

> 
> Anyway, this change is needed and right so however you decide
> to proceed:
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> >  
> > +	/*
> > +	 * For ICL, the spec states: if reference frequency is 38.4, use 19.2
> > +	 * because the DPLL automatically divides that by 2.
> > +	 */
> > +	if (IS_ICELAKE(dev_priv) && ref_clock == 38400)
> > +		ref_clock = 19200;
> > +
> >  	dco_freq = (cfgcr0 & DPLL_CFGCR0_DCO_INTEGER_MASK) * ref_clock;
> >  
> >  	dco_freq += (((cfgcr0 & DPLL_CFGCR0_DCO_FRACTION_MASK) >>
> > -- 
> > 2.16.4
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
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Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2018-08-30 15:49 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-28 15:32 [PATCH] drm/i915: Fix ICL HDMI clock readout Ville Syrjala
2018-08-28 17:26 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-08-28 20:36 ` [PATCH] " Rodrigo Vivi
2018-08-30 15:48   ` Ville Syrjälä [this message]
2018-08-30 19:09     ` Rodrigo Vivi
2018-08-28 21:07 ` ✓ Fi.CI.IGT: success for " Patchwork
2018-09-03 14:28 ` [PATCH v2] drm/i915: Fix ICL+ " Ville Syrjala
2018-09-04  5:21   ` Rodrigo Vivi
2018-09-04 13:26     ` Ville Syrjälä
2018-09-03 15:10 ` ✓ Fi.CI.BAT: success for drm/i915: Fix ICL HDMI clock readout (rev2) Patchwork
2018-09-03 21:56 ` ✓ Fi.CI.IGT: " Patchwork

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