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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 13/13] drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2.
Date: Thu,  4 Oct 2018 11:46:04 +0200	[thread overview]
Message-ID: <20181004094604.2646-14-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20181004094604.2646-1-maarten.lankhorst@linux.intel.com>

These functions already have a pointer to the correct state,
so use it instead of crtc->config.

Changes since v1:
- Move pll changes to the pll patch.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 42 ++++++++++++++--------------
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4df4293a7917..0de1ae969c87 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5594,15 +5594,15 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
 	if (pipe_config->has_pch_encoder)
 		intel_prepare_shared_dpll(pipe_config);
 
-	if (intel_crtc_has_dp_encoder(intel_crtc->config))
+	if (intel_crtc_has_dp_encoder(pipe_config))
 		intel_dp_set_m_n(intel_crtc, M1_N1);
 
 	intel_set_pipe_timings(pipe_config);
 	intel_set_pipe_src_size(pipe_config);
 
-	if (intel_crtc->config->has_pch_encoder) {
+	if (pipe_config->has_pch_encoder) {
 		intel_cpu_transcoder_set_m_n(intel_crtc,
-				     &intel_crtc->config->fdi_m_n, NULL);
+				     &pipe_config->fdi_m_n, NULL);
 	}
 
 	ironlake_set_pipeconf(pipe_config);
@@ -5611,7 +5611,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
 
 	intel_encoders_pre_enable(crtc, pipe_config, old_state);
 
-	if (intel_crtc->config->has_pch_encoder) {
+	if (pipe_config->has_pch_encoder) {
 		/* Note: FDI PLL enabling _must_ be done before we enable the
 		 * cpu pipes, hence this is separate from all the other fdi/pch
 		 * enabling. */
@@ -5630,10 +5630,10 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
 	intel_color_load_luts(&pipe_config->base);
 
 	if (dev_priv->display.initial_watermarks != NULL)
-		dev_priv->display.initial_watermarks(old_intel_state, intel_crtc->config);
+		dev_priv->display.initial_watermarks(old_intel_state, pipe_config);
 	intel_enable_pipe(pipe_config);
 
-	if (intel_crtc->config->has_pch_encoder)
+	if (pipe_config->has_pch_encoder)
 		ironlake_pch_enable(old_intel_state, pipe_config);
 
 	assert_vblank_disabled(crtc);
@@ -5650,7 +5650,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
 	 * some interlaced HDMI modes. Let's do the double wait always
 	 * in case there are more corner cases we don't know about.
 	 */
-	if (intel_crtc->config->has_pch_encoder) {
+	if (pipe_config->has_pch_encoder) {
 		intel_wait_for_vblank(dev_priv, pipe);
 		intel_wait_for_vblank(dev_priv, pipe);
 	}
@@ -5699,7 +5699,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	int pipe = intel_crtc->pipe, hsw_workaround_pipe;
-	enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
+	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
 	struct intel_atomic_state *old_intel_state =
 		to_intel_atomic_state(old_state);
 	bool psl_clkgate_wa;
@@ -5718,7 +5718,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 
 	intel_encoders_pre_enable(crtc, pipe_config, old_state);
 
-	if (intel_crtc_has_dp_encoder(intel_crtc->config))
+	if (intel_crtc_has_dp_encoder(pipe_config))
 		intel_dp_set_m_n(intel_crtc, M1_N1);
 
 	if (!transcoder_is_dsi(cpu_transcoder))
@@ -5729,12 +5729,12 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 	if (cpu_transcoder != TRANSCODER_EDP &&
 	    !transcoder_is_dsi(cpu_transcoder)) {
 		I915_WRITE(PIPE_MULT(cpu_transcoder),
-			   intel_crtc->config->pixel_multiplier - 1);
+			   pipe_config->pixel_multiplier - 1);
 	}
 
-	if (intel_crtc->config->has_pch_encoder) {
+	if (pipe_config->has_pch_encoder) {
 		intel_cpu_transcoder_set_m_n(intel_crtc,
-				     &intel_crtc->config->fdi_m_n, NULL);
+				     &pipe_config->fdi_m_n, NULL);
 	}
 
 	if (!transcoder_is_dsi(cpu_transcoder))
@@ -5748,7 +5748,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 
 	/* Display WA #1180: WaDisableScalarClockGating: glk, cnl */
 	psl_clkgate_wa = (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) &&
-			 intel_crtc->config->pch_pfit.enabled;
+			 pipe_config->pch_pfit.enabled;
 	if (psl_clkgate_wa)
 		glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, true);
 
@@ -5788,10 +5788,10 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
 	if (!transcoder_is_dsi(cpu_transcoder))
 		intel_enable_pipe(pipe_config);
 
-	if (intel_crtc->config->has_pch_encoder)
+	if (pipe_config->has_pch_encoder)
 		lpt_pch_enable(old_intel_state, pipe_config);
 
-	if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DP_MST))
+	if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST))
 		intel_ddi_set_vc_payload_alloc(pipe_config, true);
 
 	assert_vblank_disabled(crtc);
@@ -5854,12 +5854,12 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
 
 	ironlake_pfit_disable(old_crtc_state);
 
-	if (intel_crtc->config->has_pch_encoder)
+	if (old_crtc_state->has_pch_encoder)
 		ironlake_fdi_disable(crtc);
 
 	intel_encoders_post_disable(crtc, old_crtc_state, old_state);
 
-	if (intel_crtc->config->has_pch_encoder) {
+	if (old_crtc_state->has_pch_encoder) {
 		ironlake_disable_pch_transcoder(dev_priv, pipe);
 
 		if (HAS_PCH_CPT(dev_priv)) {
@@ -6060,7 +6060,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
 	if (WARN_ON(intel_crtc->active))
 		return;
 
-	if (intel_crtc_has_dp_encoder(intel_crtc->config))
+	if (intel_crtc_has_dp_encoder(pipe_config))
 		intel_dp_set_m_n(intel_crtc, M1_N1);
 
 	intel_set_pipe_timings(pipe_config);
@@ -6130,7 +6130,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
 
 	i9xx_set_pll_dividers(pipe_config);
 
-	if (intel_crtc_has_dp_encoder(intel_crtc->config))
+	if (intel_crtc_has_dp_encoder(pipe_config))
 		intel_dp_set_m_n(intel_crtc, M1_N1);
 
 	intel_set_pipe_timings(pipe_config);
@@ -6153,7 +6153,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
 
 	if (dev_priv->display.initial_watermarks != NULL)
 		dev_priv->display.initial_watermarks(old_intel_state,
-						     intel_crtc->config);
+						     pipe_config);
 	else
 		intel_update_watermarks(intel_crtc);
 	intel_enable_pipe(pipe_config);
@@ -6206,7 +6206,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
 
 	intel_encoders_post_disable(crtc, old_crtc_state, old_state);
 
-	if (!intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI)) {
+	if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI)) {
 		if (IS_CHERRYVIEW(dev_priv))
 			chv_disable_pll(dev_priv, pipe);
 		else if (IS_VALLEYVIEW(dev_priv))
-- 
2.19.0

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  parent reply	other threads:[~2018-10-04  9:46 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-04  9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
2018-10-04  9:45 ` [PATCH v2 01/13] drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2 Maarten Lankhorst
2018-10-04  9:45 ` [PATCH v2 02/13] drm/i915: Make panel fitter functions take state Maarten Lankhorst
2018-10-04  9:45 ` [PATCH v2 03/13] drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state Maarten Lankhorst
2018-10-04  9:45 ` [PATCH v2 04/13] drm/i915: Use crtc_state in ironlake_enable_pch_transcoder Maarten Lankhorst
2018-10-04  9:45 ` [PATCH v2 05/13] drm/i915: Make skl_detach_scalers take crtc_state Maarten Lankhorst
2018-10-04  9:45 ` [PATCH v2 06/13] drm/i915: Make pll functions take crtc_state, v2 Maarten Lankhorst
2018-10-04  9:45 ` [PATCH v2 07/13] drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state Maarten Lankhorst
2018-10-04  9:45 ` [PATCH v2 08/13] drm/i915: Make shared dpll functions " Maarten Lankhorst
2018-10-04 12:57   ` Ville Syrjälä
2018-10-04 13:25     ` Maarten Lankhorst
2018-10-04 15:24       ` Ville Syrjälä
2018-10-05  9:30         ` Maarten Lankhorst
2018-10-05 18:29         ` Maarten Lankhorst
2018-10-04 13:27     ` [PATCH] drm/i915: Make shared dpll functions take crtc_state, v2 Maarten Lankhorst
2018-10-05  9:41       ` [PATCH] drm/i915: Make shared dpll functions take crtc_state, v3 Maarten Lankhorst
2018-10-05  9:52         ` Maarten Lankhorst
2018-10-04  9:46 ` [PATCH v2 09/13] drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel Maarten Lankhorst
2018-10-04  9:46 ` [PATCH v2 10/13] drm/i915: Use crtc->state in intel_fbdev_init_bios Maarten Lankhorst
2018-10-04  9:46 ` [PATCH v2 11/13] drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link Maarten Lankhorst
2018-10-04  9:46 ` [PATCH v2 12/13] drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset Maarten Lankhorst
2018-10-04  9:46 ` Maarten Lankhorst [this message]
2018-10-04 10:42 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev2) Patchwork
2018-10-04 11:07 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-10-04 14:03 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3) Patchwork
2018-10-04 14:28 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-10-05  9:48 ` ✗ Fi.CI.BAT: failure for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev4) Patchwork
2018-10-05 10:12 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev5) Patchwork
2018-10-05 10:37 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-05 14:42 ` ✓ Fi.CI.IGT: " Patchwork

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