From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915/aml: Add new Amber Lake PCI ID
Date: Thu, 11 Oct 2018 11:00:46 -0700 [thread overview]
Message-ID: <20181011180046.GE4205@intel.com> (raw)
In-Reply-To: <20180927010650.22731-1-jose.souza@intel.com>
On Wed, Sep 26, 2018 at 06:06:50PM -0700, José Roberto de Souza wrote:
> This new AML PCI ID uses the same gen graphics as Coffe Lake not a
> Kaby Lake one like the other AMLs.
>
> So to make it more explicit renaming INTEL_AML_GT2_IDS to
> INTEL_AML_KBL_GT2_IDS and naming this id as INTEL_AML_CFL_GT2_IDS.
>
> v2:
> - missed add new AML macro to INTEL_CFL_IDS()
> - added derivated platform initials to AML macros
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
pushed to dinq.
> ---
> drivers/gpu/drm/i915/i915_pci.c | 3 ++-
> include/drm/i915_pciids.h | 11 ++++++++---
> 2 files changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index adac75e5d5f7..d8129b04838a 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -665,7 +665,7 @@ static const struct pci_device_id pciidlist[] = {
> INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info),
> INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
> INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info),
> - INTEL_AML_GT2_IDS(&intel_kabylake_gt2_info),
> + INTEL_AML_KBL_GT2_IDS(&intel_kabylake_gt2_info),
> INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
> INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
> INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
> @@ -673,6 +673,7 @@ static const struct pci_device_id pciidlist[] = {
> INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
> INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
> + INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info),
> INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> INTEL_CNL_IDS(&intel_cannonlake_info),
> INTEL_ICL_11_IDS(&intel_icelake_11_info),
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index fd965ffbb92e..86174f264b4a 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -365,16 +365,20 @@
> INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
>
> /* AML/KBL Y GT2 */
> -#define INTEL_AML_GT2_IDS(info) \
> +#define INTEL_AML_KBL_GT2_IDS(info) \
> INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
> INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
>
> +/* AML/CFL Y GT2 */
> +#define INTEL_AML_CFL_GT2_IDS(info) \
> + INTEL_VGA_DEVICE(0x87CA, info)
> +
> #define INTEL_KBL_IDS(info) \
> INTEL_KBL_GT1_IDS(info), \
> INTEL_KBL_GT2_IDS(info), \
> INTEL_KBL_GT3_IDS(info), \
> INTEL_KBL_GT4_IDS(info), \
> - INTEL_AML_GT2_IDS(info)
> + INTEL_AML_KBL_GT2_IDS(info)
>
> /* CFL S */
> #define INTEL_CFL_S_GT1_IDS(info) \
> @@ -427,7 +431,8 @@
> INTEL_CFL_U_GT3_IDS(info), \
> INTEL_WHL_U_GT1_IDS(info), \
> INTEL_WHL_U_GT2_IDS(info), \
> - INTEL_WHL_U_GT3_IDS(info)
> + INTEL_WHL_U_GT3_IDS(info), \
> + INTEL_AML_CFL_GT2_IDS(info)
>
> /* CNL */
> #define INTEL_CNL_IDS(info) \
> --
> 2.19.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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prev parent reply other threads:[~2018-10-11 18:00 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-27 1:06 [PATCH v2] drm/i915/aml: Add new Amber Lake PCI ID José Roberto de Souza
2018-09-27 1:58 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/aml: Add new Amber Lake PCI ID (rev2) Patchwork
2018-09-27 2:19 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-10-05 23:01 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-06 6:02 ` ✓ Fi.CI.IGT: " Patchwork
2018-10-11 18:00 ` Rodrigo Vivi [this message]
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