From: Zhenyu Wang <zhenyuw@linux.intel.com>
To: "Zhang, Tina" <tina.zhang@intel.com>
Cc: kalyan.kondapally@intel.com, intel-gfx@lists.freedesktop.org,
intel-gvt-dev@lists.freedesktop.org
Subject: Re: [RFC PATCH 2/7] drm/i915/gvt: Use meta fbs to stand for vGPU's planes
Date: Mon, 3 Dec 2018 16:35:45 +0800 [thread overview]
Message-ID: <20181203083545.GT12743@zhen-hp.sh.intel.com> (raw)
In-Reply-To: <20181203082104.GS12743@zhen-hp.sh.intel.com>
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On 2018.12.03 16:21:04 +0800, Zhenyu Wang wrote:
> On 2018.12.03 15:35:17 +0800, Tina Zhang wrote:
> > Create and initialize vGPU meta framebuffers during vGPU's creation.
> > Each meta framebuffer is an intel_framebuffer. Userspace can get the
> > userspace visible identifier of that meta framebuffer by accessing
> > plane_id_index attribute.
> >
> > For example:
> > In "/sys/bus/pci/devices/0000\:00\:02.0/$vGPU_id/intel_vgpu/" directory,
> >
> > /* plane_id_index: pipe#(bit16:8) and plane#(bit7:0)*/
> > echo "0x10" > plane_index_id //Set the index to the plane 0 of pipe 1
> >
> > /*
> > * Dump userspace visible identifier of the meta framebuffer
> > * standing for the primary plane of the vGPU's pipe one
> > */
> > cat plane_index_id //dump the id for plane 0 of pipe 1
> >
> > Then userspace can use this id with the exsting KMS IOCTL, e.g.
> > drmModeSetPlane, to assign a physical plane to this virtual plane.
>
> How does user know which plane/pipe is active for vGPU? Looks from
> current code it has no way to know that. I think for guest display
> assignment, we need to know the display state of vGPU and it looks
> there's no state tracking, e.g what if guest driver switches to
> another plane for display? How could user know that then adjust for
> assignment?
>
> And really don't like sysfs to r/w file for id, even if doesn't use
> vfio gfx dmabuf interface for guest display object presentation, a
> vendor specific vfio device ioctl if possible is better.
>
And add that this device specific info sysfs is created when mdev
device created before it's opened for vGPU instance. So I don't think
it's proper place to put display config info.
--
Open Source Technology Center, Intel ltd.
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next prev parent reply other threads:[~2018-12-03 8:35 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-03 7:35 [RFC PATCH 0/7] drm/i915/gvt: Enable vGPU local display direct flip Tina Zhang
2018-12-03 7:35 ` [RFC PATCH 1/7] drm/i915: Introduce meta framebuffer Tina Zhang
2018-12-03 7:35 ` [RFC PATCH 2/7] drm/i915/gvt: Use meta fbs to stand for vGPU's planes Tina Zhang
2018-12-03 8:21 ` Zhenyu Wang
2018-12-03 8:35 ` Zhenyu Wang [this message]
2018-12-03 8:58 ` Zhang, Tina
2018-12-03 8:53 ` Zhang, Tina
2018-12-03 8:55 ` Zhang, Tina
2018-12-03 7:35 ` [RFC PATCH 3/7] drm/i915: Introduce async plane update to i915 Tina Zhang
2018-12-03 7:35 ` [RFC PATCH 4/7] drm/i915: Extend async plane update to other planes Tina Zhang
2018-12-03 7:35 ` [RFC PATCH 5/7] drm/i915/gvt: Introduce vGPU plane page flip framework Tina Zhang
2018-12-03 7:35 ` [RFC PATCH 6/7] drm/i915/gvt: Enable guest direct page flip Tina Zhang
2018-12-03 7:35 ` [RFC PATCH 7/7] drm/i915/gvt: Introduce HW Vblank interrupt to vGPU Tina Zhang
2018-12-03 7:53 ` ✗ Fi.CI.BAT: failure for drm/i915/gvt: Enable vGPU local display direct flip Patchwork
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