From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915: Pick the first unused PLL once again
Date: Thu, 31 Jan 2019 09:49:05 +0200 [thread overview]
Message-ID: <20190131074905.GU20097@intel.com> (raw)
In-Reply-To: <20190131012407.od5ek5jzduw4f2ri@ldmartin-desk.jf.intel.com>
On Wed, Jan 30, 2019 at 05:24:07PM -0800, Lucas De Marchi wrote:
> On Wed, Jan 30, 2019 at 08:13:59PM +0200, Ville Syrjälä wrote:
> >From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> >commit 5b0bd14dcc6b ("drm/i915/icl: keep track of unused pll while
> >looping") inadvertently (I presume) changed the code to pick the
> >last unused dpll rather than the first unused one like we did before.
> >
> >While there should most likely be no harm in changing the order
> >let's change back just to avoid a change in the behaviour. At
> >least it might reduce the confusion when staring at logs (took
> >me a while to figure out why DPLL1 being picked over DPLL0
> >when the latter was most definitely available).
>
>
> I assumed the no harm and simplest approach so I didn't bother
> checking if the it was already set. So I'd not say it was
> "inadvertently", it was on purpose.
That would have been good to mention in the commit msg.
>
> But if it makes life easier to read the logs:
>
> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Ta. Pushed.
>
>
> Lucas De Marchi
>
> >
> >Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> >Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >---
> > drivers/gpu/drm/i915/intel_dpll_mgr.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> >index 8f70838ac7d8..0a42d11c4c33 100644
> >--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> >+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> >@@ -258,7 +258,8 @@ intel_find_shared_dpll(struct intel_crtc *crtc,
> >
> > /* Only want to check enabled timings first */
> > if (shared_dpll[i].crtc_mask == 0) {
> >- unused_pll = pll;
> >+ if (!unused_pll)
> >+ unused_pll = pll;
> > continue;
> > }
> >
> >--
> >2.19.2
> >
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2019-01-31 7:49 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-30 18:13 [PATCH] drm/i915: Pick the first unused PLL once again Ville Syrjala
2019-01-30 19:29 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-01-30 23:03 ` [PATCH] " Paulo Zanoni
2019-01-31 1:24 ` Lucas De Marchi
2019-01-31 7:49 ` Ville Syrjälä [this message]
2019-01-31 1:56 ` ✓ Fi.CI.IGT: success for " Patchwork
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