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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/4] drm/i915: Implement display w/a 1140 for glk/cnl
Date: Thu, 31 Jan 2019 10:07:05 -0800	[thread overview]
Message-ID: <20190131180705.GE19523@intel.com> (raw)
In-Reply-To: <20190131074216.3994-2-ville.syrjala@linux.intel.com>

On Thu, Jan 31, 2019 at 09:42:14AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Display w/a #1140 tells us we have to program the transition
> watermark to the minimum value on glk/cnl. Let's do that.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 5ce60faef28c..d91aec396a4c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4844,8 +4844,7 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate,
>  {
>  	struct drm_device *dev = cstate->base.crtc->dev;
>  	const struct drm_i915_private *dev_priv = to_i915(dev);
> -	u16 trans_min, trans_y_tile_min;
> -	const u16 trans_amount = 10; /* This is configurable amount */
> +	u16 trans_min, trans_y_tile_min, trans_amount;
>  	u16 wm0_sel_res_b, trans_offset_b, res_blocks;
>  
>  	/*
> @@ -4859,9 +4858,16 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate,
>  	if (!dev_priv->ipc_enabled)
>  		return;
>  
> -	trans_min = 14;
>  	if (INTEL_GEN(dev_priv) >= 11)
>  		trans_min = 4;
> +	else
> +		trans_min = 14;
> +
> +	/* Display WA #1140: glk,cnl */
> +	if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
> +		trans_amount = 0;
> +	else
> +		trans_amount = 10; /* This is configurable amount */
>  
>  	trans_offset_b = trans_min + trans_amount;
>  
> -- 
> 2.19.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  reply	other threads:[~2019-01-31 18:07 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-31  7:42 [PATCH 1/4] drm/i915: Enable transition watermarks for glk Ville Syrjala
2019-01-31  7:42 ` [PATCH 2/4] drm/i915: Implement display w/a 1140 for glk/cnl Ville Syrjala
2019-01-31 18:07   ` Rodrigo Vivi [this message]
2019-01-31  7:42 ` [PATCH 3/4] drm/i915: Document that we implement WaIncreaseLatencyIPCEnabled Ville Syrjala
2019-01-31 18:08   ` Rodrigo Vivi
2019-01-31  7:42 ` [PATCH 4/4] drm/i915: Drop WaIncreaseLatencyIPCEnabled/1140 for cnl Ville Syrjala
2019-01-31 18:10   ` Rodrigo Vivi
2019-02-04 17:40     ` Ville Syrjälä
2019-02-04 17:49       ` Rodrigo Vivi
2019-02-04 17:58         ` Ville Syrjälä
2019-01-31  9:11 ` ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Enable transition watermarks for glk Patchwork
2019-01-31 18:04 ` [PATCH 1/4] " Rodrigo Vivi
2019-01-31 20:07 ` ✗ Fi.CI.IGT: failure for series starting with [1/4] " Patchwork
2019-02-04 17:38   ` Ville Syrjälä
2019-02-05 11:39     ` Petri Latvala
2019-02-05 19:34 ` ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Enable transition watermarks for glk (rev2) Patchwork

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