From: "Ville Syrjälä via dri-devel" <dri-devel@lists.freedesktop.org>
To: Kevin Strasser <kevin.strasser@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v5 0/3] Support 64 bpp half float formats
Date: Wed, 13 Feb 2019 17:53:12 +0200 [thread overview]
Message-ID: <20190213155312.GH20097@intel.com> (raw)
In-Reply-To: <1549662583-21571-1-git-send-email-kevin.strasser@intel.com>
On Fri, Feb 08, 2019 at 01:49:40PM -0800, Kevin Strasser wrote:
> This series defines new formats and adds implementation to the i915 driver.
> Since posting v1 I have removed the pixel normalize property, as it's not needed
> for basic functionality. Also, I have been working on adding support to
> userspace, but we can't land any patches until drm_fourcc.h has been updated
> here.
>
> I have submitted a series to Mesa to make use of the RGBA ordered formats:
> https://patchwork.freedesktop.org/series/54759/
>
> My igt branch is reworked to drop usage of pixel normalize and includes use
> of f16c intrinsics to speed up conversion:
> https://gitlab.freedesktop.org/strassek/igt-gpu-tools/commits/fp16
Was that posted to the ml? I can't seem to find it.
Anyways, a quick look at the web thing tells me this predates
Maarten's cairo float stuff. I believe that has now landed so you
should probably switch to using that instead of rendering at 8bpc.
>
> I also have a libdrm branch with fp16 coverage added to modetest:
> https://gitlab.freedesktop.org/strassek/drm/commits/fp16
>
> To serve as a smoke test of the whole stack I have a modified version of
> kmscube:
> https://gitlab.freedesktop.org/strassek/kmscube/commits/fp16
>
> Kevin Strasser (3):
> drm/fourcc: Add 64 bpp half float formats
> drm/i915: Refactor icl_is_hdr_plane
> drm/i915/icl: Implement half float formats
>
> drivers/gpu/drm/drm_fourcc.c | 4 ++
> drivers/gpu/drm/i915/intel_atomic.c | 3 +-
> drivers/gpu/drm/i915/intel_display.c | 29 +++++++++++++-
> drivers/gpu/drm/i915/intel_drv.h | 7 ++--
> drivers/gpu/drm/i915/intel_sprite.c | 73 +++++++++++++++++++++++++++++++-----
> include/uapi/drm/drm_fourcc.h | 11 ++++++
> 6 files changed, 112 insertions(+), 15 deletions(-)
>
> --
> 2.7.4
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2019-02-13 15:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-08 21:49 [PATCH v5 0/3] Support 64 bpp half float formats Kevin Strasser
2019-02-08 21:49 ` [PATCH v5 1/3] drm/fourcc: Add " Kevin Strasser
2019-02-08 21:49 ` [PATCH v5 2/3] drm/i915: Refactor icl_is_hdr_plane Kevin Strasser
2019-02-08 21:49 ` [PATCH v5 3/3] drm/i915/icl: Implement half float formats Kevin Strasser
2019-02-08 22:35 ` ✗ Fi.CI.CHECKPATCH: warning for Support 64 bpp half float formats (rev6) Patchwork
2019-02-08 22:55 ` ✓ Fi.CI.BAT: success " Patchwork
2019-02-09 5:15 ` ✓ Fi.CI.IGT: " Patchwork
2019-02-13 15:53 ` Ville Syrjälä via dri-devel [this message]
2019-02-13 15:56 ` [PATCH v5 0/3] Support 64 bpp half float formats Maarten Lankhorst
2019-02-14 0:54 ` Strasser, Kevin
2019-02-15 19:41 ` Adam Jackson
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