From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 5/5] drm/i915: Move w/a 0477/WaDisableIPC:skl into intel_init_ipc()
Date: Mon, 18 Feb 2019 22:52:50 +0200 [thread overview]
Message-ID: <20190218205250.31215-5-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20190218205250.31215-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Move the w/a to disable IPC on SKL closer to the actual code
that implements IPS. Otherwise I just end up confused as to
what is excluding SKL from considerations.
IMO this makes more sense anyway since the hw does have the
feature, we're just not supposed to use it.
And this also makes us actually disable IPC in case eg. the
BIOS enabled it when it shouldn't have.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_pci.c | 2 --
drivers/gpu/drm/i915/intel_pm.c | 19 ++++++++++++++-----
2 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c4d6b8da9b03..eaa69c83b8b2 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -505,8 +505,6 @@ static const struct intel_device_info intel_cherryview_info = {
#define SKL_PLATFORM \
GEN9_FEATURES, \
- /* Display WA #0477 WaDisableIPC: skl */ \
- .display.has_ipc = 0, \
PLATFORM(INTEL_SKYLAKE)
static const struct intel_device_info intel_skylake_gt1_info = {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2bd1a47a134a..e177f229a2ca 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6333,16 +6333,25 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
I915_WRITE(DISP_ARB_CTL2, val);
}
+static bool intel_can_enable_ipc(struct drm_i915_private *dev_priv)
+{
+ /* Display WA #0477 WaDisableIPC: skl */
+ if (IS_SKYLAKE(dev_priv))
+ return false;
+
+ /* Display WA #1141: SKL:all KBL:all CFL */
+ if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
+ return dev_priv->dram_info.symmetric_memory;
+
+ return true;
+}
+
void intel_init_ipc(struct drm_i915_private *dev_priv)
{
if (!HAS_IPC(dev_priv))
return;
- /* Display WA #1141: SKL:all KBL:all CFL */
- if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
- dev_priv->ipc_enabled = dev_priv->dram_info.symmetric_memory;
- else
- dev_priv->ipc_enabled = true;
+ dev_priv->ipc_enabled = intel_can_enable_ipc(dev_priv);
intel_enable_ipc(dev_priv);
}
--
2.19.2
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next prev parent reply other threads:[~2019-02-18 20:53 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-18 20:52 [PATCH 1/5] drm/i915: Enable transition watermarks for glk Ville Syrjala
2019-02-18 20:52 ` [PATCH 2/5] drm/i915: Implement display w/a 1140 for glk/cnl Ville Syrjala
2019-02-18 20:52 ` [PATCH 3/5] drm/i915: Document that we implement WaIncreaseLatencyIPCEnabled Ville Syrjala
2019-02-18 20:52 ` [PATCH 4/5] drm/i915: Drop WaIncreaseLatencyIPCEnabled/1140 for cnl Ville Syrjala
2019-02-18 20:52 ` Ville Syrjala [this message]
2019-02-19 17:50 ` [PATCH 5/5] drm/i915: Move w/a 0477/WaDisableIPC:skl into intel_init_ipc() Rodrigo Vivi
2019-02-18 21:49 ` ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Enable transition watermarks for glk Patchwork
2019-02-19 2:48 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-03-20 23:54 ` ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Enable transition watermarks for glk (rev2) Patchwork
2019-03-21 6:21 ` ✗ Fi.CI.IGT: failure " Patchwork
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